用AU1200设计便携式媒体播放器

 

Originally developed by AMD, and now available from RMI (a company founded by AMD's former COO), the Alchemy Au1200 processor is a highly integrated system-on-a-chip (SoC)product built expressly for PMPs equipped with high-performance videocapabilities, including long run time and support for multiple codecswithout transcoding.

The growing wave of premium digitalvideo content has challenged PMP designers and manufacturers to createdevices with more versatile, higher power video capabilities whilemaintaining form factor and other capabilities pushing the explosion ofPMP's into the market. Consumer electronics market research firmIn-Stat forecasts that worldwide PMP shipments will reach 5 millionunits by the end of 2006 , while senior analyst Chris Crotty of iSupplirecently stated that the market for PMP semiconductors is expected todouble to $6.4 billion in the next three years.

These trends strongly influenced the design goals behind the RMI Alchemy Au1200 processor,a highly integrated system-on-a-chip (SoC) product built expressly tomeet the requirements of a PMP equipped with high-performance videocapabilities. For developers and original equipment manufacturers(OEMs) looking to build a PMP around the RMI Alchemy Au1200 processor,a closer look at this processor's characteristics alongside one of thePMP reference designs available from RMI may be helpful in mapping outan overall device approach.

Design considerations and video performance

Oneof the biggest challenges facing PMP designers today is deliveringhigh-quality video playback while minimizing power consumption toenable long playback times. The Alchemy Au1200 has addressed thisproblem with the integrated Media Acceleration Engine (MAE)architecture. The MAE not only enables devices to play native contentfrom all popular formats, but is also able to deliver that content atrates that are competitive with mainstream entertainment systems. TheAu1200 can play native video content that is based on MPEG (1, 2 and4), DivX, Windows Media (WMV9/VC-1) and XviD. While other devices inthis market may compromise on screen sizes and frame rates, the MAEenables the Au1200 to deliver full D1 resolution video (720X480) at 30frames-per-second, and data rates up to 10Mbps for substantially lowerpower than would be required to drive a QVGA (320x480) mobile panel.

Table 1: Video format and resolution

Video decompression and decoding

Indesigning a PMP that can play back premium video content at DVD-qualityresolution, one of the major challenges is meeting the computationaldemands of decoding high-quality MPEG/WMV video content. With mostcurrent devices, native D1 (720x480 resolution) video content must betranscoded to a lower bit-rate and resolution because the PMP eitherlacks sufficient processing resources or is too power-hungry to playthe files at full size and rate. Downloading video content onto a PCfor transcoding can take as long as the playback time of the fileitself, which diminishes the user experience.

The RMI Alchemy Au1200 processoraddresses this need by providing support of common digital media codecs-- including MPEG (1,2 and 4) DivX and WMV9 -- and delivering full D1resolution without the need to transcode content. Mated on a singlechip with the MIPS32 processor core, the MAE performs power-intensivetasks such as video decoding, scaling, color space conversion andfiltering in hardware, thus freeing the processor core to handle userinterface functions, audio processing and other demands. The integratedMAE is a low-power alternative to using a DSP to decode the videocontent. The MAE spares developers from having to either investsignificant time in DSP programming or added expense in hiring a 3rdparty for this task.

Memory architecture

Employinga single-chip solution also sidesteps a number of cost and engineeringproblems inherent in the multiple-memory controller designs that use aDSP/CPU combination, such as the need for separate memory banks tohandle DSP decoding and application processing functions. With the RMI Alchemy Au1200 processor'sunified memory architecture, PMP developers can use up to 512MB 2.5VDDR1, 1.8V DDR2, or Mobile DDR memory at speeds up to 500MHz (DDR2) in16-bit or 32-bit implementations. Those seeking to achieve lower powerconsumption in their devices might choose 1.8V DDR2 or Mobile DDR,while the 32-bit implementation option can satisfy a higher-end PMPmodel's appetite for video and graphics data.

Where costconsiderations outweigh the need for large memory bandwidth, the 16-bitDDR avenue is open as well. The availability of processor speeds up to500MHz gives a developer the flexibility to build additionalcapabilities -- such as Wi-Fi, GPS and digital media broadcast -- intothe PMP design.

Direct Memory Access (DMA) control

Tosupport the large volume of memory transfers typically required inmulti-function PMP designs, while keeping the physical area of theprocessor small, the RMI Alchemy Au1200 processor'sdescriptor-based direct memory access (DBDMA) controller autonomouslymanages multiple sequential data transfers via a linked list ofdescriptors. This design provides a developer with 16 DMA channels,arbitrated as high- and low-priority pools, that can be addressed usinground-robin or weighted priority techniques. The DBDMA controller alsoaugments DMA transfers with operating modes and data managementstrategies that are tailored to tasks as well as to a PMP'sconsumer-centric use model.

This includes an incrementmode that supports the transfer of any byte count from any bytealignment, and a decrement mode that supports the requirement of SecureDigital (SD) devices for backwards data feed without using buffermemory to perform the data reversal. The DBDMA also supportsconditional data transfers using compare-and-branch and subroutinedescriptors, which enable branching to commonly used descriptors withautomatic return and the ability to poll an on-chip or off-chipregister.

Figure 1: RMI Alchemy Au1200 block diagram

Camera interface

To meet consumers' demand for imaging capabilities in a PMP, developers can employ the RMI Alchemy Au1200 processor'sCamera Interface Module (CIM), which supports data input modes forCCD/CMOS sensors and CCIR656. Both of these formats are served by theMAE, which provides Bayer pattern demosaic for CCD/CMOS along withscaling, color space conversion and filtering for all CIM paralleloperating modes. CIM input data is moved into memory, unchanged, via aRaw Data mode.

LCD control

Developershave full 32-bit aRGB capabilities in each of four prioritized overlaywindows using the LCD controller in the RMI Alchemy Au1200 processor.This enables overlay window repositioning with no frame buffermodification as well as gamma correction for each window to match thevideo display with graphics. A global background color helps thedeveloper aesthetically unify display panel contents with minimaldemands on processing power. The controller's 8Kb palette RAM framebuffer complements a PMP's idle mode in supporting a low-power systeminformation display, such as alarm times.

Scalability and versatility factors

The RMI Alchemy Au1200 processor'sstatic bus facilitates added versatility and scalability in PMP designsby accommodating a range of devices with interface similarities -- suchas RAM, ROM, NOR flash, PCMCIA/CF, IDE and NAND flash -- as well assupporting 10/100 Ethernet connectivity. Developers can further scaletheir designs with the processor's on-chip interface to the IDE drive,which supports simple DMA mode, PIO mode and multi-mode DMA fordelivering video and audio data to the PMP.

AES encryption/decryption

Giventhe necessity for owners of copyrighted digital content such as movies,music videos and televised programming to protect their intellectualproperty from pirating, PMPs must also be able to recognize and enforcethe digital rights management (DRM) security measures built into thiscontent en route to enabling its playback. These capabilities arehandled by the RMI Alchemy Au1200 processor'sAES Cryptography Engine. It supports the U.S. government's 128-bitAdvanced Encryption Standard (AES) in ECB, CBC, CFB and OFB modes, anduses the data transfer capabilities of the DBDMA Controller to augmentencryption/decryption functions. Since decryption is handled in on-chiphardware, rather than in software, PMP developers can avoid slowingdown the application processor with this function thus applyingprocessing power to other device requirements. In PMP designs wherepower vs. throughput is a key consideration, the AES CryptographyEngine offers four bandwidth choices: 44, 22, 11 and 5.5 Mbps operation.

Power management

In addition to the other low-power attributes described previously, the RMI Alchemy Au1200 processor supports power conservation in the PMP use model with the following modes:

?SleepMode is a low-power state in which memory contents can be maintained byinvoking DDR self-refresh. Developers can optimize this state forlowest power consumption by disabling the internal power supply (VDDI)during sleep. They also can program the time out of sleep in VDDIrise-time increments of 5, 20 and 100 milliseconds, or keep the VDDIactive for faster wake-up.

?Hibernate Mode allows thesystem to be powered off while a separate battery back-up on XPWR32keeps the time-of-year clock alive to allow for a periodic wakeupmechanism in the PMP device.

The RMI Alchemy Au1200 processoralso supports DDR memory power management for DDR1 and DDR2 in threeconfigurable power-down modes that occur automatically, so there is nosoftware interaction required from the PMP.

The DDRcontroller includes the following options during idle periods:Automatically drive the clock-enable signal (DCKE) low Automaticallypre-charge on idle and drive DCKE low, putting the DDR into"power-down" mode with all DDR banks closed Drive DCKE low and wait fora specified idle time to precharge and drive DCKE low.

TheLCD controller's 8Kb palette RAM frame buffer, mentioned earlier, canbe loaded with low-resolution images to support PMP operation inpower-saving modes. This will enable refreshes to occur out of paletteRAM while DDR is put in self-refresh, thereby reducing powerconsumption while still allowing frame buffer access.

Anatomy of a PMP design

RMIsupports device manufacturers' need for differentiation in their PMPdesigns by providing numerous development tools to streamline theprocess and reduce the design cycle. Development platforms, SDKs andreference designs from RMI, combined with third-party products rangingfrom companion devices to turn-key designs provided by RMI partners,deliver the basic functionality of the PMP as well as additionalfeatures to jump-start a specific product definition.

Designedand developed in China and in Korea, the Au1200 PMP reference designdelivers an extensible, "go-to-market" PMP platform. This helps freeOEMs to focus on delivering their specific market differentiation whilealso maintaining price points required to be viable in thecost-sensitive consumer electronics market.

Figure 2: Au1200 PMP Reference design block diagram

ThePMP reference design offered by RMI supplements the DBAu1200development board and SDKs, which provide developers the basicdevelopment environment for RMI's Alchemy Au1200 designs. These toolsprovide the environment in which to develop, bring up and debug systemsoftware and integrated peripherals --essential steps in the successfuldevelopment of a PMP.

Cost vs. performance considerations

Costreduction is one of the primary design challenges that PMP developerswill encounter. Consumer products are constantly under pressure toincrease functionality while reducing cost. Most companies agree thePMP market increases significantly as prices drop below the $400 and$300 retail price points. SOC integration and design simplification aretwo of the most effective ways to reduce system costs.

Inaddition to integrating all of the base functionality a PMP requires,developers can simplify their PMP design with the Au1200 by eliminatingthe cost and complexity of separate programming and memory for thegraphics controller and video acceleration. In addition, the processorprovides a glueless interface to standard components such as Flashmemory and hard disk drives for added simplicity.

Developerscan further reduce their system costs by allowing the system to boot,run and store data in a common memory subsystem. Traditional designsuse separate memory types -- one for boot-up and the operating system,and another dedicated to the memory space for applications and datastorage. System developers have long desired to use a single type offlash memory in their design. This effort has posed challenges in thepast due to performance issues and memory reliability of thetechnologies: NOR technology provides reliable memory for crucialfunctions like booting the system, while NAND provides lower cost andhigher performance.

Using the Au1200 reference design,developers can solve this problem by implementing a NAND boot loaderfor reading a block of reliable memory during power-up and allowing thesystem to use the balance of the flash memory as a standard NAND flashfile system.

Peripheral additions

Addingcustom peripherals is another perennial concern for system designersusing highly integrated SOCs. More often than not, the chip is missinga specific I/O requirement to interface to a crucial device. The designmay require an integral GPS receiver that interfaces through a SPI portand a touch-screen controller that needs I2S. The Au1200 designovercomes this dilemma by including a large number of highlyconfigurable interfaces. If a developer needs to add a serial device,the Au1200 contains two programmable serial controllers that can beconfigured for AC-97, I2S, SMBus or SPI.

The typical PMPtoday has a number of interrupt-driven controls such as screennavigation buttons; stop, play and rewind; and possibly others. Adiscrete design would require an external controller chip to managemore than a very small number of switches. By contrast, the Au1200provides a large number of general purpose I/O (GPIO) pins that cansupport external events like control buttons and power switches withoutthe need for an additional chip.

There are countlessperipherals that a system developer might need to interface with theAu1200. Many devices can be supported through standard interfaces likeUSB and SDIO. Using a standard interface cuts development time byproviding standard drivers and software stacks. Complex solutions canbe connected through the Au1200 "static bus" interface. As with USB,SDIO and others, the static bus is designed to be a flexible interfacefor connecting devices that need full access to the internal data bus.Examples include 3D graphics, video encoders or TV-out solutions.

Complementary products and support

TheAu1200 has an established infrastructure of tools, design aids anddevelopment assistance, provided by industry-leading companies thatunderstand the pivotal role this device plays in the exploding PMPmarket. Products and services available from RMI range from simpledriver support to a complete system design. For example, RMI currentlyhas multiple partners providing solutions to decode the MPEG-4, part 10AVC (H.264) video format and partners delivering finished goods, readyfor resale into the market.

In designing the RMI Alchemy Au1200 processorto specifically meet the demands of PMP use models, RMI has sought toemphasize high-performance processing power, single memoryarchitecture, glue-less interfaces, flexible I/O's and standardconnectivity. As an alternative to typical multi-processor designs, theAu1200 can help PMP developers optimally balance the characteristics oflow power consumption and high-quality video/audio processing in asingle chip.

For the latest information on the selectionof tools and partners who support the Alchemy Au1200, visit the RMIAlchemy developer Web site at http://www.razamicro.com/products_alchemy/

By Rob Oliver, Director of Marketing, and Ed WhiteManager of Business Development, Raza Microelectronics Inc.