omap-l138烧写程序之

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omap-l138烧写程序之 - 启动模式选择及确认

本文介绍烧写omap-l138程序到nand flash之前的准备工作 – 启动模式选择。

1 启动模式选择

下载Using the OMAP-L132/L138Bootloader.pdf，这个文档专门讲了omap-l138的各种启动模式。

启动模式选择如下图所示：
这里写图片描述

对于omap-l138来说，BOOT[7:0]和引脚之间的关系如下表所示：

BOOT位 BOOT7 BOOT6 BOOT5 BOOT4 BOOT3 BOOT2 BOOT1 BOOT0 引脚 P4 R3 R2 R1 T3 T2 T1 U3

我的板子上BOOT0固定为下拉，BOOT1固定为上拉，只有BOOT2~BOOT4可通过跳线的方式选择上拉或下拉。板上的nand flash为K9NBG08U5A，通过跳线将T2、T3上拉，选择启动模式为NAND 8，nand flash的原理图如下所示：
这里写图片描述

2 启动模式确认

    一般情况下，启动模式选择对应的引脚的电压都会经过电阻分压得到，假如引脚上的电压为2.8V，不确定omap认为是低电平还是高电平，那么，可以按照以下方法来确认。   （1）需要用到OMAPL1x_debug.gel，这是官方给出的gel文件，可以在这里下载到http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files，下载保存到本地磁盘备用。   （2）连接arm核，方法是：View -> Target Configurations -> 右击配置好的ccxml文件 -> Launch Selected Configurations -> 在Debug面板那里，右击 ARM9_0 -> Connect Target，连接上ARM核。   （3）打开 Gel Files面板，方法如下图所示：

这里写图片描述

   打开 Gel Files面板后，如下图所示：

这里写图片描述

   （4）加载gel文件，右击Gel Files面板，选择菜单 Load Gel，浏览到OMAPL1x_debug.gel所在的目录并选择加载，加载后如下图所示：

这里写图片描述

    （5）验证启动模式，方法是选中OMAPL1x_debug.gel，再单击菜单Scripts -> Diagnostics -> Run_All，如下图所示：

这里写图片描述

   运行后，在Console面板会输出一些信息，其中就有启动模式选择的信息，我这里给出CCS打印出的信息如下：---------------------------------------------ARM9_0: GEL Output: |             Device Information            |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: DEV_INFO_00 = 0x1B7D102FARM9_0: GEL Output: DEV_INFO_01 = 0x00000000ARM9_0: GEL Output: DEV_INFO_02 = 0x0000000EARM9_0: GEL Output: DEV_INFO_03 = 0x00000033ARM9_0: GEL Output: DEV_INFO_04 = 0x00000000ARM9_0: GEL Output: DEV_INFO_05 = 0x000003E0ARM9_0: GEL Output: DEV_INFO_06 = 0x00000200ARM9_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-6525781-3-32-30ARM9_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 3,0,0,2911ARM9_0: GEL Output: -----ARM9_0: GEL Output: DEV_INFO_17 = 0x00030003ARM9_0: GEL Output: DEV_INFO_18 = 0x00000000ARM9_0: GEL Output: DEV_INFO_19 =ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: ARM9_0: GEL Output: -----ARM9_0: GEL Output: DEV_INFO_20 = 0x30303864ARM9_0: GEL Output: DEV_INFO_21 = 0x3830306BARM9_0: GEL Output: DEV_INFO_22 = 0x30303864ARM9_0: GEL Output: DEV_INFO_23 = 0x3830306BARM9_0: GEL Output: -----ARM9_0: GEL Output: DEV_INFO_24 = 0x0301E020ARM9_0: GEL Output: DEV_INFO_25 = 0x00639355ARM9_0: GEL Output: DEV_INFO_06 = 0x00000200ARM9_0: GEL Output: DEV_INFO_26 = 0x16BE0003ARM9_0: GEL Output: ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: |               BOOTROM Info                |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: ROM ID: d800k008 ARM9_0: GEL Output: Silicon Revision 2.1ARM9_0: GEL Output: Boot pins: 14ARM9_0: GEL Output: Boot Mode: NAND 8ARM9_0: GEL Output: ROM Status Code: 0x00000000 Description:ARM9_0: GEL Output: No errorARM9_0: GEL Output: Program Counter (PC) = 0xCA08AAA4ARM9_0: GEL Output: ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: |              Clock Information             |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: ARM9_0: GEL Output: PLLs configured to utilize crystal.ARM9_0: GEL Output: ASYNC3 = PLL0_SYSCLK2ARM9_0: GEL Output: ARM9_0: GEL Output: NOTE:  All clock frequencies in following PLL sections are basedARM9_0: GEL Output: off OSCIN = 24 MHz.  If that value does not match your hardwareARM9_0: GEL Output: you should change the #define in the top of the gel file, save it,ARM9_0: GEL Output: and then reload.ARM9_0: GEL Output: ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: |              PLL0 Information             |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: ARM9_0: GEL Output: PLL0_SYSCLK1 = 372 MHzARM9_0: GEL Output: PLL0_SYSCLK2 = 186 MHzARM9_0: GEL Output: PLL0_SYSCLK3 = 124 MHzARM9_0: GEL Output: PLL0_SYSCLK4 = 93 MHzARM9_0: GEL Output: PLL0_SYSCLK5 = 124 MHzARM9_0: GEL Output: PLL0_SYSCLK6 = 372 MHzARM9_0: GEL Output: PLL0_SYSCLK7 = 62 MHzARM9_0: GEL Output: ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: |              PLL1 Information             |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: ARM9_0: GEL Output: PLL1_SYSCLK1 = 300 MHzARM9_0: GEL Output: PLL1_SYSCLK2 = 150 MHzARM9_0: GEL Output: PLL1_SYSCLK3 = 100 MHzARM9_0: GEL Output: ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: |              PSC0 Information             |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: ARM9_0: GEL Output: State Decoder:ARM9_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)ARM9_0: GEL Output:  1 = SyncReset (reset assered, clock on)ARM9_0: GEL Output:  2 = Disable (reset de-asserted, clock off)ARM9_0: GEL Output:  3 = Enable (reset de-asserted, clock on)ARM9_0: GEL Output: >3 = Transition in progressARM9_0: GEL Output: ARM9_0: GEL Output: Module 0:   EDMA3CC (0)        STATE = 3ARM9_0: GEL Output: Module 1:   EDMA3 TC0          STATE = 3ARM9_0: GEL Output: Module 2:   EDMA3 TC1          STATE = 3ARM9_0: GEL Output: Module 3:   EMIFA (BR7)        STATE = 3ARM9_0: GEL Output: Module 4:   SPI 0              STATE = 3ARM9_0: GEL Output: Module 5:   MMC/SD 0           STATE = 3ARM9_0: GEL Output: Module 6:   AINTC              STATE = 3ARM9_0: GEL Output: Module 7:   ARM RAM/ROM        STATE = 3ARM9_0: GEL Output: Module 9:   UART 0             STATE = 3ARM9_0: GEL Output: Module 10:  SCR 0 (BR0/1/2/8)  STATE = 3ARM9_0: GEL Output: Module 11:  SCR 1 (BR4)        STATE = 3ARM9_0: GEL Output: Module 12:  SCR 2 (BR3/5/6)    STATE = 3ARM9_0: GEL Output: Module 13:  PRUSS              STATE = 0ARM9_0: GEL Output: Module 14:  ARM                STATE = 3ARM9_0: GEL Output: Module 15:  DSP                STATE = 3ARM9_0: GEL Output: ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: |              PSC1 Information             |ARM9_0: GEL Output: ---------------------------------------------ARM9_0: GEL Output: ARM9_0: GEL Output: State Decoder:ARM9_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)ARM9_0: GEL Output:  1 = SyncReset (reset assered, clock on)ARM9_0: GEL Output:  2 = Disable (reset de-asserted, clock off)ARM9_0: GEL Output:  3 = Enable (reset de-asserted, clock on)ARM9_0: GEL Output: >3 = Transition in progressARM9_0: GEL Output: ARM9_0: GEL Output: Module 0:   EDMA3CC (1)        STATE = 3ARM9_0: GEL Output: Module 1:   USB0 (2.0)         STATE = 3ARM9_0: GEL Output: Module 2:   USB1 (1.1)         STATE = 3ARM9_0: GEL Output: Module 3:   GPIO               STATE = 3ARM9_0: GEL Output: Module 4:   UHPI               STATE = 3ARM9_0: GEL Output: Module 5:   EMAC               STATE = 3ARM9_0: GEL Output: Module 6:   DDR2 and SCR F3    STATE = 3ARM9_0: GEL Output: Module 7:   MCASP0 + FIFO      STATE = 3ARM9_0: GEL Output: Module 8:   SATA               STATE = 3ARM9_0: GEL Output: Module 9:   VPIF               STATE = 3ARM9_0: GEL Output: Module 10:  SPI 1              STATE = 3ARM9_0: GEL Output: Module 11:  I2C 1              STATE = 3ARM9_0: GEL Output: Module 12:  UART 1             STATE = 3ARM9_0: GEL Output: Module 13:  UART 2             STATE = 3ARM9_0: GEL Output: Module 14:  MCBSP0 + FIFO      STATE = 3ARM9_0: GEL Output: Module 15:  MCBSP1 + FIFO      STATE = 3ARM9_0: GEL Output: Module 16:  LCDC               STATE = 3ARM9_0: GEL Output: Module 17:  eHRPWM (all)       STATE = 3ARM9_0: GEL Output: Module 18:  MMC/SD 1           STATE = 3ARM9_0: GEL Output: Module 19:  UPP                STATE = 3ARM9_0: GEL Output: Module 20:  eCAP (all)         STATE = 3ARM9_0: GEL Output: Module 21:  EDMA3 TC2          STATE = 3ARM9_0: GEL Output: Module 24:  SCR-F0 Br-F0       STATE = 3ARM9_0: GEL Output: Module 25:  SCR-F1 Br-F1       STATE = 3ARM9_0: GEL Output: Module 26:  SCR-F2 Br-F2       STATE = 3ARM9_0: GEL Output: Module 27:  SCR-F6 Br-F3       STATE = 3ARM9_0: GEL Output: Module 28:  SCR-F7 Br-F4       STATE = 3ARM9_0: GEL Output: Module 29:  SCR-F8 Br-F5       STATE = 3ARM9_0: GEL Output: Module 30:  Br-F7 (DDR Contr)  STATE = 3ARM9_0: GEL Output: Module 31:  L3 RAM, SCR-F4, Br-F6 STATE = 3

其中的BOOTROM Info有启动模式选择的结果
Boot Pins 为14，对应的二进制数为 0000 1110，说明启动模式选择和预想中的一致。

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