按键消抖法1：debounce2（格式不同，实质一样）

module Debounce #

(
parameter KEY_WIDTH = 1，//按键个数
parameter CNT_NUM = 19'd240000  //20ms的计数
)
(
input clk, //system clock
input rst_n, //system reset
input [KEY_WIDTH-1:0] key, //button input，按键输入
output reg [KEY_WIDTH-1:0] key_edge, //按键消抖
output wire[KEY_WIDTH-1:0] key_pulse, //Debounce pulse output ，按键脉冲输出
output reg [KEY_WIDTH-1:0] key_state, //Debounce state output，按键状态输出
output [10:0] empty
);

assign empty = 11'h7ff;

reg [KEY_WIDTH-1:0] key_r,key_r_pre;

always @(posedge clk or negedge rst_n)
if (!rst_n) begin
key_r <= {KEY_WIDTH{1'b1}};
key_r_pre<= {KEY_WIDTH{1'b1}};

end 

else begin

key_r <= key;
key_r_pre <= key_r;
end

//Detect the edge of key_n

wire key_edge = (key_r == key_r_pre)? 1'b0:1'b1;

reg [18:0] cnt;
//Count when a edge of key_n is occured
always @(posedge clk or negedge rst_n)
if (!rst_n) cnt <= 19'd0;
else if(key_edge) cnt <=19'd0;
else cnt <= cnt + 1'b1;

//Sample key_jit when cnt count to CNT_NUM(20ms)
always @(posedge clk or negedge rst_n)
if (!rst_n) key_sec<= {KEY_WIDTH{1'b1}};
else if (cnt == CNT_NUM-1) key_sec<= key;

reg [KEY_WIDTH-1:0] key_sec_pre;
//Register key_jit_r, lock key_jit to next clk
always @(posedge clk or negedge rst_n)
if (!rst_n) key_sec_pre <= {KEY_WIDTH{1'b1}};
else key_sec_pre <= key_sec;


assign key_pulse = key_sec_pre & ( ~key_sec);


always @(posedge clk or negedge rst_n)
if (!rst_n) key_state <= {KEY_WIDTH{1'b1}};

else if(key_pulse) key_state <= key_state ^ key_pulse;// a异或1=~a

else key_state <= key_state;

endmodule