S32K144 EVB之FLASH

开发环境

IAR7.8 + S32K144-EVB

关于Flash的读写，参考了下面的例程:
https://community.nxp.com/docs/DOC-332754

但是上面的例程只能在RAM里面运行，在Flash中运行时，会在操作Flash时，系统就会复位

在S32K14x Series Cookbook.pdf文档里，找到了一段初始化的代码：

LMEM->PCCCR = 0x85000001; /* Invalidate cache & enable write buffer, cache */MSCM->OCMDR[0] = 0x00000020; /* Bit 5 = 1: Enable program flash prefetch buffer */MSCM->OCMDR[1] = 0x00000020; /* Bit 5 = 1: Enable data flash prefetch buffer */

至此，Flash能够正常读写而不会引起复位，示例代码如下:

#include "S32K144.h"#include "S32K144_features.h"#define RED     15#define GREEN   16#define BLUE    0#define BTN0    12#define BTN1    13#define BIT(n)  (1 << (n))typedef unsigned char   u8;typedef unsigned short  u16;typedef unsigned long   u32;typedef void (*pFunction)(void);typedef  void (*iapfun)(void);pFunction Jump_To_Application;pFunction jump2app;#define FLASH_APP1_ADDR     0x00002000static void Clock_Config(void);static void Gpio_Config(void);static void LED_light(u8 color);void MSR_MSP(u32 addr);static void iap_load_app(u32 appxaddr);static void EraseAndProgram(void);static u32 temp[2];int main(void){    u32 cnt;            cnt = 0;        Clock_Config();        Gpio_Config();        LED_light(1);        EraseAndProgram();        temp[0] = *(unsigned int *)0x00040000;                temp[1] = *(unsigned int *)0x00040004;        if (0xFEEDFACE == temp[0])                LED_light(1+2);        if (0xCAFEBEEF == temp[1])                LED_light(1+2+4);        while (1) {                cnt ++;                if (PTC->PDIR & (BIT(BTN0) | BIT(BTN1))) {                        LED_light(0);                        iap_load_app(FLASH_APP1_ADDR);//执行FLASH APP代码                } else {                        LED_light(7);                }        }}void SOSC_init_8MHz(void){        SCG->SOSCDIV=0x00000101; /* SOSCDIV1 & SOSCDIV2 =1: divide by 1 */        SCG->SOSCCFG=0x00000024;         /* Range=2: Medium freq (SOSC between 1MHz-8MHz)*/        /* HGO=0: Config xtal osc for low power */        /* EREFS=1: Input is external XTAL */        while(SCG->SOSCCSR & SCG_SOSCCSR_LK_MASK); /* Ensure SOSCCSR unlocked */        SCG->SOSCCSR=0x00000001;         /* LK=0: SOSCCSR can be written */        /* SOSCCMRE=0: OSC CLK monitor IRQ if enabled */        /* SOSCCM=0: OSC CLK monitor disabled */        /* SOSCERCLKEN=0: Sys OSC 3V ERCLK output clk disabled */        /* SOSCLPEN=0: Sys OSC disabled in VLP modes */        /* SOSCSTEN=0: Sys OSC disabled in Stop modes */        /* SOSCEN=1: Enable oscillator */        while(!(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK)); /* Wait for sys OSC clk valid */}void SPLL_init_160MHz(void){        while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */        SCG->SPLLCSR = 0x00000000; /* SPLLEN=0: SPLL is disabled (default) */        SCG->SPLLDIV = 0x00000302; /* SPLLDIV1 divide by 2; SPLLDIV2 divide by 4 */        SCG->SPLLCFG = 0x00180000; /* PREDIV=0: Divide SOSC_CLK by 0+1=1 */        /* MULT=24: Multiply sys pll by 4+24=40 */        /* SPLL_CLK = 8MHz / 1 * 40 / 2 = 160 MHz */        while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK); /* Ensure SPLLCSR unlocked */        SCG->SPLLCSR = 0x00000001;         /* LK=0: SPLLCSR can be written */        /* SPLLCMRE=0: SPLL CLK monitor IRQ if enabled */        /* SPLLCM=0: SPLL CLK monitor disabled */        /* SPLLSTEN=0: SPLL disabled in Stop modes */        /* SPLLEN=1: Enable SPLL */        while(!(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK)); /* Wait for SPLL valid */}void NormalRUNmode_80MHz (void){        /* Change to normal RUN mode with 8MHz SOSC, 80 MHz PLL*/        SCG->RCCR=SCG_RCCR_SCS(6) | SCG_RCCR_DIVCORE(1) | SCG_RCCR_DIVBUS(1) | SCG_RCCR_DIVSLOW(2);        while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT ) != 6) {}        /* Wait for sys clk src = SPLL */}static void Clock_Config(void){        SOSC_init_8MHz(); /* Initialize system oscillator for 8 MHz xtal */        SPLL_init_160MHz(); /* Initialize sysclk to 160 MHz with 8 MHz SOSC */        NormalRUNmode_80MHz(); /* Init clocks: 80 MHz sysclk & core, 40 MHz bus, 20 MHz flash */}static void Gpio_Config(void){        //config clock source        PCC->PCCn[PCC_PORTD_INDEX] = 0x40000000;        PCC->PCCn[PCC_PORTC_INDEX] = 0x40000000;        //config LED        PORTD->PCR[RED] = 0x00000100;        PORTD->PCR[GREEN] = 0x00000100;        PORTD->PCR[BLUE] = 0x00000100;        //set direction        PTD->PDDR |= BIT(RED) | BIT(GREEN) | BIT(BLUE);        //default output        PTD->PDOR |= BIT(RED) | BIT(GREEN) | BIT(BLUE);        //config BTN        PORTC->PCR[BTN0] = 0x00000100;        PORTC->PCR[BTN1] = 0x00000100;        //set direction        PTC->PDDR &=~(BIT(BTN0) | BIT(BTN1));}static void LED_light(u8 color){        PTD->PDOR |= BIT(RED) | BIT(GREEN) | BIT(BLUE);        if (color & 0x01)                PTD->PDOR &=~BIT(RED);        if (color & 0x02)                PTD->PDOR &=~BIT(GREEN);        if (color & 0x04)                PTD->PDOR &=~BIT(BLUE);}void MSR_MSP(u32 addr){        __asm("MSR MSP, r0\n"    //去掉“__”也可        "BX r14\n");}void iap_load_app(u32 appxaddr){    //if(((*(volatile u32*)appxaddr)&0x2FFE0000)==0x20000000)   //检查栈顶地址是否合法.    {         jump2app=(iapfun)*(u32*)(appxaddr+4);       //用户代码区第二个字为程序开始地址(复位地址)                //MSR_MSP(*(volatile u32*)appxaddr);                    //初始化APP堆栈指针(用户代码区的第一个字用于存放栈顶地址)        jump2app();                                 //跳转到APP.    }}/*FSTAT                   Flash Status RegisterFCNFG                   Flash Configuration RegisterFSEC                    Flash Security RegisterFOPT                    Flash Option RegisterFCCOB[FTFC_FCCOB_COUNT] Flash Common Command Object RegistersFPROT[FTFC_FPROT_COUNT] Program Flash Protection RegistersFEPROT                  EEPROM Protection RegisterFDPROT                  Data Flash Protection RegisterFCSESTAT                Flash CSEc Status RegisterFERSTAT                 Flash Error Status RegisterFERCNFG                 Flash Error Configuration Register*/void EraseAndProgram(void){        LMEM->PCCCR = 0x85000001; /* Invalidate cache & enable write buffer, cache */        MSCM->OCMDR[0] = 0x00000020; /* Bit 5 = 1: Enable program flash prefetch buffer */        MSCM->OCMDR[1] = 0x00000020; /* Bit 5 = 1: Enable data flash prefetch buffer */        //erase 4KB flash sector (the smallest entity that can be erased) at 0x0004_0000        while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0);   //wait if operation in progress        FTFC->FSTAT = FTFC_FSTAT_FPVIOL_MASK | FTFC_FSTAT_ACCERR_MASK | FTFC_FSTAT_FPVIOL_MASK; //clear flags if set        FTFC->FCCOB[3] = 0x09;  //Erase Flash Sector command (0x09)         FTFC->FCCOB[2] = 0x04;  //Flash address [23:16]         FTFC->FCCOB[1] = 0x00;  //Flash address [15:08]         FTFC->FCCOB[0] = 0x00;  //Flash address [7:0]           FTFC->FSTAT = FTFC_FSTAT_CCIF_MASK; //launch command            while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0);   //wait for done         //program phrase at address 0x0004_0000         while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0);   //wait if operation in progress         FTFC->FSTAT = FTFC_FSTAT_FPVIOL_MASK | FTFC_FSTAT_ACCERR_MASK | FTFC_FSTAT_FPVIOL_MASK;         FTFC->FCCOB[3] = 0x07;  //Program Phrase command (0x07)         FTFC->FCCOB[2] = 0x04;  //Flash address [23:16]         FTFC->FCCOB[1] = 0x00;  //Flash address [15:08]         FTFC->FCCOB[0] = 0x00;  //Flash address [7:0]           FTFC->FCCOB[7] = 0xFE;  //data          FTFC->FCCOB[6] = 0xED;          FTFC->FCCOB[5] = 0xFA;          FTFC->FCCOB[4] = 0xCE;          FTFC->FCCOB[11] = 0xCA;         FTFC->FCCOB[10] = 0xFE;         FTFC->FCCOB[9] = 0xBE;          FTFC->FCCOB[8] = 0xEF;          FTFC->FSTAT = FTFC_FSTAT_CCIF_MASK; //launch command            while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0);   //wait for done}