Memory Management

The Fifties:

Absolute Addresses

Dynamic address translation

The sixties:

Paged Memory systems and TLBs

Atlas's Demand paging

Modern:

Virtual Memory Systems

Machine language address => as specified in machine code

virtual address => ISA specifies translation of machine code address into virtual address of program variable.

physical address => operating system specifies mapping of virtual address into name for a physical memory location.

Translation of machine code address into virtual address may involve a segment register.

physical memory location => actual address signals going to DRAM chips.

 

absolute addresses

EDSAC,early 50's

effective address = physical memory address

Only one program ran at a time , with unrestricted access to entire machine (RAM + I/O devices)

Address in a program depended upon where the program was to be loaded in memory

but is was more convenient for programmers to write location-independent subroutines

how could location independence be achieved?

led to the development of loaders and linkers to statically relocate and link programs.

 

Dynamic Address Translation

motivation:

In the early machines , IO operations were slow and each word transferred involved the CPU

Higher throughput if CPU and IO of 2 or more programs were overlapped. How ?

multiprogramming

 

location independent programs:

programming and storage management ease => need for a base register.

protection:

independent programs should not affect each other inadvertently => need for a bound register

 

simple Base and bound Translation

 

effective address register <= boundregister --->bound violation

effective address register + base register = OK

base and bounds registers only visible/accessible when processor running in kernel (supervisor) mode .

 

separate areas for program and data

what is an advantage of this separation?

Used today on Cray vector supercomputers

 

permits sharing of program segments

 

Memory Fragmentation

As users come and go , the storage is "fragmented".

Therefore, at some stage programs have to be moved around to compact the storage.

called burping the memory

 

Paged Memory Systems

Processor generated address can be interpreted as a pair <page number, offset>

_________________

|page number |offset|

a page table contains the physical address of the base of each page.

what requirement does fixed-length pages plus indirection through page table relax?

relaxes the contiguous allocation requirement