2440学习笔记

S3C2440有两个PLL：MPLL和UPLL，UPLL专用与USB设备。MPLL用于CPU及其他外围器件。
通过MPLL会产生三个部分的时钟频率：FCLK、HCLK、PLCK。FCLK用于CPU核，HCLK用于AHB总线的设备(比如SDRAM)，PCLK用于APB总线的设备(比如UART)。
FCLK is used by ARM920T.
HCLK is used for AHB bus, which is used by the ARM920T, the memory controller, the interrupt controller, the LCD
controller, the DMA and USB host block.
PCLK is used for APB bus, which is used by the peripherals such as WDT, IIS, I2C, PWM timer, MMC interface,
ADC, UART, GPIO, RTC and SPI.


The S3C2440A has two Phase Locked Loops (PLLs):
one for FCLK, HCLK, and PCLK, and the other dedicated for USB block (48Mhz).

AMBA(Advanced Micro controller Bus Architecture)规范主要包括了AHB(Advanced High performance Bus)系统总线和APB(Advanced Peripheral Bus)外围总线。

CPSR (Current Program Status Register).This contains condition code flags and the current mode bits.
N, 31: Negative/Less Than
Z, 30: Zero
C, 29: Carry/Borrow/Extend
V, 28: Overflow

Saved Process Status Registers (SPSR)

stack pointer register (SP)
link register (LR)
Program Counter (PC)

The ARM State Register Set:
Register 14: This register is used as the subroutine link register. This receives a copy of R15 when a BL instruction is executed.
Register 15: This register holds the Program Counter (PC).
Register 16: This register is the CPSR (Current Program Status Register).

Memory Management Unit (MMU)
Software Interrupt Instruction (SWI), is used for entering Supervisor mode.

算术逻辑单元 (ALU), 是中央处理器(CPU)的执行单元，是所有中央处理器的核心组成部分.

;ARM的系统软件开发中主要包含RO，RW,ZI三个段组成。
;其中RO为代码段；RW为已经初始化的全局变量；ZI是未初始化的全局变量

Certain operations (TST, TEQ, CMP, CMN) do not write the result to Rd. They are used only to perform tests and to
set the condition codes on the result and always have the S bit set.
 
ARM Instruction Set P99

BUS WIDTH & WAIT CONTROL REGISTER (BWSCON)

SRAM是英文Static RAM的缩写，它是一种具有静止存取功能的内存，不需要刷新电路即能保存它内部存储的数据。而DRAM（Dynamic Random Access Memory)每隔一段时间，要刷新充电一次，否则内部的数据即会消失，因此SRAM具有较高的性能。

SROM means ROM or SRAM type memory

USB host interface and USB device interface needs 48Mhz clock.

前缀表示法：
    ldr r5, [r6, #4]  ; r5 <- [r6 + 4]
    str r3, [r4, #8]  ; r3 -> [r4 + 8]
后缀表示法：
    ldr    r3, [r0], #4  ; r3 <- [r0], r0 <- r0 + 4
    str    r3, [r1], #4  ; r3 -> [r1], r1 <- r1 + 4

EINT0 - EINT23: GPF0 - GPF7, GPG0 - GPG15    (24个)
If GPF0–GPF7 or GPG0 - GPG15 will be used for wake-up signals at power down mode, the ports will be set in interrupt mode.   
GPG[15:13] must be selected as Input in NAND boot mode.

To recognize the level interrupt, the valid logic level on EXTINTn pin must be retained for 40ns at least because of the
noise filter.

使用ldr说明绝对地址, 使用adr/adrl说明相对地址。

arm-linux-gcc的配置：
1. http://www.handhelds.org/download/projects/toolchain/下载arm-linux-gcc-3.4.1.tar.bz2,并解压缩；
2. edit /etc/profile 加入环境变量PATH.
   #Kenny: for arm board support.
   export PATH=$PATH:/home/sea/work/arm/arm-linux-gcc-3.4.1/usr/local/arm/3.4.1/bin

Norflash的型号为Eon的EN29LV160AB。  
P243