UP DOWN COUNTER WITH LOAD

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`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: SEU.IC
// Engineer: RAY
//
// Create Date:    18:47:13 03/31/2011
// Design Name: up_down_counter
// Module Name:    up_down_counter
// Project Name: Counters
//////////////////////////////////////////////////////////////////////////////////
module up_down_counter(
     Load_in, //Load计数初值使能
     Data_in, //初值
     Clock,
     Reset,
     CounterON_in,  //计数器使能
     UpDown_in,  //up/down 控制
     CountResult_out //计数结果
     );
    
    input Load_in;
    input [3:0] Data_in;
    input Clock;
    input Reset;
    input CounterON_in;
    input UpDown_in;
    output [3:0] CountResult_out;

    reg [3:0] CountResult_out;;
    
     always @(posedge Clock or negedge Reset)
     begin
      if(!Reset)
         CountResult_out <= 'd0;
      else if(Load_in)
                CountResult_out <= Data_in;
             else if(CounterON_in)
                    begin
                         if(UpDown_in)
                            CountResult_out <= CountResult_out + 'd1;
                         else
                            CountResult_out <= CountResult_out - 'd1;
                      end
     end

endmodule

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