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2011-05-2412:04:07
话不多说,x86/ia32架构,先在Intel官网下了developer's manual,别的先没需要。
封面,copyrights,contents就懒得去看了
manual 1分为15章,附带5个appendix
first is the notation:bit and byte,一言以蔽之:从右到左,从下到上,然后就是威胁你不能用保留位(reserved bit),听话点就乖乖的屏蔽保留位吧~(Do not... 真像我妈)follow the documentation~ or read it before load it~
instruction's format:
lable: mnemonic argument1, argument2, argument3
when two operands are presented in an arithmetic or logical instruction
loadreg: mov eax, subtotalthe right is the source and the left is the destination
hexadecimal: badh
binary: 0101b
segmented addressing: the processor uses byte addressing address spacesegments: many independent address spaces
segments segments segments so many segments
code addresses-> code spacestack addresses -> stack space everyone has its space~ oh nice~ code data code data~~~ chang data to code(i'm evil)
where is the data/code in the segment???? oh -> segment-register:Byte-address
the byte at address ff79h in the segment pointed by the ds registerds:ff79hcs:eip
cpuid,cr,msr???
cpuid: feature flags, status, and system information
| |
cr:control registermsr:model-specific register
cpuid.01h:ecx.sse[bit 25]=1
+---------------------------------------------------------------------------+
| | |
input values for eax & ecx registers; | |
if only one value, eax is implied. | |
out put register and freture flag or field |
name with bit position(s) |
value (or range)of output
oh loard it's os tiering
a good web study materal:http://www.cse.nd.edu/~dthain/courses/cse40243/fall2008/ia32-intro.html
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