SHARC21479timer总结

 The ADSP-214xx processors contain identical 32-bit peripheral timers that can be used to interface with external devices. Each timer can be individually configured in three operation modes.

    Three operation modes (PWM, Width capture, external watchdog)

    timer的寄存器：

    The (TMSTAT) register indicates the status of both timers using a single read. The TMSTAT register also contains timer enable bits.

    Counter Registers (TMxCNT)：The timer counter value should not be set directly by the software. It can be set indirectly by initializing the period or width values in the appropriate mode.

    Period Registers (TMxPRD). When enabled and running, the processor writes new values to the timer period and pulse width registers.

    timer的周期与寄存器值之间的关系

    When clocked internally, the clock source is the processor’s peripheral clock (PCLK). The timer produces a waveform with a period equal to 2 x TMxPRD and a width equal to 2 × TMxW. The period and width are set through the TMxPRD30–0 and the TMxW30–0 bits. Bit 31 is ignored for both.第31位被忽略，所以最大值是2e31.

    我用timer进行定时，所以采用的是PWM_OUT模式

    timer寄存器赋值后如何开始计数

    If the period and width values are valid after the timer is enabled, the count register is loaded with the value resulting from 0xFFFF FFFF – width. The timer counts upward to 0xFFFF FFFF. Instead of incrementing to 0xFFFF FFFF, the timer then reloads the counter with the value derived from 0xFFFF FFFF – (period – width) and repeats.

    刚开始我一直不理解是什么意思，后来在Programming Model下找到了答案

The timer produces PWM waveform with a period of 2 x period and a width of 2 x width.
? When 2 x width expires, the counter is loaded with 2x(period – width) and continues counting.
? When 2 x period expires, the counter is loaded with 2 x width value again and the cycle repeats.
? When the width or period expires, the IRQ bit (if enabled) is set depending on the PRDCNT bit.
? When IRQ is sensed, read the status register (TMxSTAT) and perform the appropriate “write-one” to clear.

    其实就是开始在TMxCNT里写入 2 x width 的值，满了之后就写入2x(period – width) 的值，再满了后重新写入 2 x width 。其实总的来说就是在TMxCNT里写入了2 x period个数，只不过分了两次来写。

    而且它里面计数的规则跟普通的单片机不同，它是从0xFFFF FFFF – width开始计数，到0xFFFF FFFF 停止，这也是为什么会有 0xFFFF FFFF – width和0xFFFF FFFF – (period – width) 的原因了。知道了这个周期就好算了，T = 2 x period x 1/ PCLK

    中断

    The TMSTAT register contains an interrupt latch bit (TIMxIRQ) and an overflow/error indicator bit (TIMxOVF) for each timer. These sticky bits are set by the timer hardware and may be watched by software. They need to be cleared in the TMSTAT register by software explicitly.