The speed of light is just too slow - SI go thru #1
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The title is the first words of High-Speed Digital System Design by Steven and Garret. At the first spotting of this words, most ppl would think: "what a bullshit this is!". Wait a second. Let me explain it to you.
The speed of light in vaccum is 85ps/inch, and is 140ps-180ps/inch on FR4. The reciprocal of 100ps is 10GHz. After the 40G/100G ethernet standard was published last year, can we not say 10G is too slow? maybe we can, hehe.
Ok, get back to my beloved SI stuff. What I've gone thru are:
1. t-line theory.
Nothing new excepts for the explanation given by Bogatin on why the incident voltage at a 50 ohm t-line from a drive w/ 10 ohm ro is 5/6 rather than 10/6 if calculated as t-line. The essence here is: for short line, it can be treated as either lumped circuit, or t-line. When being treated as latter case, a 10 ohm t-line should be added into the model. Well, this sounds not right. I will put more thinking on it later.
2. x-talk.
Odd-mode x-talk reduce the mutual L while increases the mutual C hence reduce the Z0 and TD. Even-mode vice versa. The variation is about 10%. Looks we better stay away from this +-10% variation in practice, otherwise the consequent reflections could be a nightmare?
3. losses
skin-effect is the main contributor to the loss. Surprisingly the skin depth is only 10um@50MHz, which is even less than half mil! It is funny to see the density distribution of the return current on the ref plane.
4. serpentine routing.
Sserpentine routing couldd has x-talk issue. Not allowed to routing clock signal in this way. How about placing GND trace in between? Need to sim this to see how it goes.
5. branch topology.
As long as the branches are symmetric and the impd are multiplied to the number of branches, there will be no issue. Need to sim for full comprehension.
6. non-ideal return path.
The excessively long return path increase the L hence slows down the rising edge. So does the gap.
7. reference planes
The pitfall of referencing to power plane is the decoupling current is doubled when transitioning from H to L. It will be ok if sufficient decoupling cap is used. After jogging, I figured out the principle here:
#1 Refed to power plane.
When the driver pulls down the output, the transition current will flow thru the GND and return to Vcc via the decoupling cap. The reason for twice current is on the assumption that the output impd of the driver is the same as the Z0.
When pull up, no current flowing into GND hence no current change to the cap.
#2 Refed to GND plane.
Both pulling up and pulling down the current changes to the GND hence to the cap are the same, in reverse direction.
8.
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