uboot-1.3.2移植到s3c2410

 

1、下载u-boot源码：u-boot-1.3.2.tar.gz（文件大小约为7M）

 

2、用SSH服务登陆linux，将源码拷贝到linux下的/home/arm-work/下，这个是我自己习惯的目录与共享文件方式，具体情况，因个人喜好而异。你也可以用其它方式拷贝文件。

 

3、进入linux系统

切换到/home/arm-work/目录下:

cd //home/arm-work/

解压源码:

tar zxvf u-boot-1.3.2.tar.gz

此时解压后得到u-boot目录，下面即为1.3.2的源码，将其改名为u-boot-1.3.2:

mv u-boot u-boot-1.3.2

进入到源码目录：

cd u-boot-1.3.2/

 

4、现在开始就进行整个源码的移植工作，

1、建立自己开发板的目录，我将我的开发板取名为s3c2410,现在大多开发板都是由三星公司的SMDK2410板子改装而来，所以为了尽量地省改文件，将SMDK开发板的相关目录拷贝过来进行修改即可。

建立自己开发板目录：

cp -rf board/smdk2410 board/yys2410

建立自己开发板的配置头文件：(分析考虑需不需要复制smdk2410.c到s3c2410.c)

cp include/configs/smdk2410.h include/configs/s3c2410.h

为自己的开发板添加配置：

emacs Makefile 或vi Makefile

在适当位置添中自己的板子

smdk2400_config : unconfig

 @$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 NULL s3c24x0

smdk2410_config : unconfig

 @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0

s3c2410_config : unconfig

 @$(MKCONFIG) $(@:_config=) arm arm920t s3c24102410 NULL s3c24x0

（注意红色部分为我添加或者修改的）

此时再终端中输入：

make s3c2410_config

终端将显示：

Configuring for s3c2410 board...

再进行一下编译：

make CROSS_COMPILE=arm-linux-

一阵编译的英语飘过……

若编译通过，则将会在目录下生成u-boot.bin，表明建立自己的开发板已经成功，可进到第二步，进行相关的修改，以符合自己的开发板。

 

2、修改cpu/arm920t/start.S文件，让其从nand flash启动

 emacs cpu/arm920t/start.S  或vi ……

在此我将这个文件全部粘贴出来：（我已作修改）

/*

 *  armboot - Startup Code for ARM920 CPU-core

 *

 *  Copyright (c) 2001 Marius Gr鰃er <[e-mail]>

 *  Copyright (c) 2002 Alex Z黳ke <[e-mail]>

 *  Copyright (c) 2002 Gary Jennejohn <[e-mail]>

 *

 * See file CREDITS for list of people who contributed to this

 * project.

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation; either version 2 of

 * the License, or (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,

 * MA 02111-1307 USA

 */

#include <config.h>

#include <version.h>

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#ifdef CONFIG_AT91RM9200

#include <status_led.h>

#endif /* CONFIG_AT91RM9200 */

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

/*

 *************************************************************************

 *

 * Jump vector table as in table 3.1 in [1]

 *

 *************************************************************************

 */

.globl _start

_start: b       start_code

 ldr pc, _undefined_instruction

 ldr pc, _software_interrupt

 ldr pc, _prefetch_abort

 ldr pc, _data_abort

 ldr pc, _not_used

 ldr pc, _irq

 ldr pc, _fiq

_undefined_instruction: .word undefined_instruction

_software_interrupt: .word software_interrupt

_prefetch_abort: .word prefetch_abort

_data_abort:  .word data_abort

_not_used:  .word not_used

_irq:   .word irq

_fiq:   .word fiq

 .balignl 16,0xdeadbeef

/*

 *************************************************************************

 *

 * Startup Code (called from the ARM reset exception vector)

 *

 * do important init only if we don't start from memory!

 * relocate armboot to ram

 * setup stack

 * jump to second stage

 *

 *************************************************************************

 */

_TEXT_BASE:

 .word TEXT_BASE

.globl _armboot_start

_armboot_start:

 .word _start

/*

 * These are defined in the board-specific linker script.

 */

.globl _bss_start

_bss_start:

 .word __bss_start

.globl _bss_end

_bss_end:

 .word _end

#ifdef CONFIG_USE_IRQ

/* IRQ stack memory (calculated at run-time) */

.globl IRQ_STACK_START

IRQ_STACK_START:

 .word 0x0badc0de

/* IRQ stack memory (calculated at run-time) */

.globl FIQ_STACK_START

FIQ_STACK_START:

 .word 0x0badc0de

#endif

/*

 * the actual start code

 */

start_code:

 /*

  * set the cpu to SVC32 mode

  */

 mrs r0,cpsr

 bic r0,r0,#0x1f

 orr r0,r0,#0xd3

 msr cpsr,r0

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#ifdef CONFIG_AT91RM9200

 bl coloured_LED_init

 bl red_LED_on

#endif /* CONFI_AT91RM9200 */

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)

 /*

  * relocate exception table

  */

 ldr r0, =_start

 ldr r1, =0x0

 mov r2, #16

copyex:

 subs r2, r2, #1

 ldr r3, [r0], #4

 str r3, [r1], #4

 bne copyex

#endif

#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)

 /* turn off the watchdog */

# if defined(CONFIG_S3C2400)

#  define pWTCON  0x15300000

#  define INTMSK  0x14400008 /* Interupt-Controller base addresses */

#  define CLKDIVN 0x14800014 /* clock divisor register */

#else

#  define pWTCON  0x53000000

#  define INTMSK  0x4A000008 /* Interupt-Controller base addresses */

#  define INTSUBMSK 0x4A00001C

#  define CLKDIVN 0x4C000014 /* clock divisor register */

# endif

 ldr     r0, =pWTCON

 mov     r1, #0x0

 str     r1, [r0]

 /*

  * mask all IRQs by setting all bits in the INTMR - default

  */

 mov r1, #0xffffffff

 ldr r0, =INTMSK

 str r1, [r0]

# if defined(CONFIG_S3C2410)

 ldr r1, =0x3ff

 ldr r0, =INTSUBMSK

 str r1, [r0]

# endif

 /* FCLK:HCLK:PCLK = 1:2:4 */

 /* default FCLK is 120 MHz ! */

 ldr r0, =CLKDIVN

 mov r1, #3

 str r1, [r0]

#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */

 /*

  * we do sys-critical inits only at reboot,

  * not when booting from ram!

  */

#ifndef CONFIG_SKIP_LOWLEVEL_INIT

 bl cpu_init_crit

#endif

#ifdef CONFIG_AT91RM9200

#ifndef CONFIG_SKIP_RELOCATE_UBOOT

relocate:    /* relocate U-Boot to RAM     */

 adr r0, _start  /* r0 <- current position of code   */

 ldr r1, _TEXT_BASE  /* test if we run from flash or RAM */

 cmp     r0, r1                  /* don't reloc during debug         */

 beq     stack_setup

 ldr r2, _armboot_start

 ldr r3, _bss_start

 sub r2, r3, r2  /* r2 <- size of armboot            */

 add r2, r0, r2  /* r2 <- source end address         */

copy_loop:

 ldmia r0!, {r3-r10}  /* copy from source address [r0]    */

 stmia r1!, {r3-r10}  /* copy to   target address [r1]    */

 cmp r0, r2   /* until source end addreee [r2]    */

 ble copy_loop

#endif /* CONFIG_SKIP_RELOCATE_UBOOT */

#endif

 

/* add%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#ifdef CONFIG_S3C2410_NAND_BOOT

 bl copy_myself

#endif /* CONFIG_S3C2410_NAND_BOOT */

/* add%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

 /* Set up the stack          */

stack_setup:

 ldr r0, _TEXT_BASE  /* upper 128 KiB: relocated uboot   */

 sub r0, r0, #CFG_MALLOC_LEN /* malloc area                      */

 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */

#ifdef CONFIG_USE_IRQ

 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)

#endif

 sub sp, r0, #12  /* leave 3 words for abort-stack    */

clear_bss:

 ldr r0, _bss_start  /* find start of bss segment        */

 ldr r1, _bss_end  /* stop here                        */

 mov  r2, #0x00000000  /* clear                            */

clbss_l:str r2, [r0]  /* clear loop...                    */

 add r0, r0, #4

 cmp r0, r1

 ble clbss_l

 ldr pc, _start_armboot

_start_armboot: .word start_armboot

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

/*

 *************************************************************************

 *

 * copy u-boot to ram

 *

 *************************************************************************

 */

#ifdef CONFIG_S3C2410_NAND_BOOT

copy_myself:

 mov r10, lr    @save return address to r10

 ldr sp, DW_STACK_START  

 mov fp, #0     

 bl NF_Init    

 ldr r0, =UBOOT_RAM_BASE   

 mov r1, #0x0  

 mov r2, #0x30000  

 bl nand_read_whole  

      

 tst r0, #0x0  

 beq ok_nand_read  

1: b 1b    

ok_nand_read:

 mov r0, #0x00000000

 ldr r1, =UBOOT_RAM_BASE

 mov r2, #0x400 

go_next:

 ldr r3, [r0], #4

 ldr r4, [r1], #4

 teq r3, r4

 bne notmatch

 subs r2, r2, #4

 beq done_nand_read

 bne go_next

notmatch:

1: b 1b

done_nand_read:

 mov pc, r10  

#endif   

 

DW_STACK_START:

 .word STACK_BASE+STACK_SIZE-4

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

/*

 *************************************************************************

 *

 * CPU_init_critical registers

 *

 * setup important registers

 * setup memory timing

 *

 *************************************************************************

 */

#ifndef CONFIG_SKIP_LOWLEVEL_INIT

cpu_init_crit:

 /*

  * flush v4 I/D caches

  */

 mov r0, #0

 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */

 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */

 /*

  * disable MMU stuff and caches

  */

 mrc p15, 0, r0, c1, c0, 0

 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)

 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)

 orr r0, r0, #0x00000002 @ set bit 2 (A) Align

 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache

 mcr p15, 0, r0, c1, c0, 0

 /*

  * before relocating, we have to setup RAM timing

  * because memory timing is board-dependend, you will

  * find a lowlevel_init.S in your board directory.

  */

 mov ip, lr

#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)

#else

 bl lowlevel_init

#endif

 mov lr, ip

 mov pc, lr

#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

/*

 *************************************************************************

 *

 * Interrupt handling

 *

 *************************************************************************

 */

@

@ IRQ stack frame.

@

#define S_FRAME_SIZE 72

#define S_OLD_R0 68

#define S_PSR  64

#define S_PC  60

#define S_LR  56

#define S_SP  52

#define S_IP  48

#define S_FP  44

#define S_R10  40

#define S_R9  36

#define S_R8  32

#define S_R7  28

#define S_R6  24

#define S_R5  20

#define S_R4  16

#define S_R3  12

#define S_R2  8

#define S_R1  4

#define S_R0  0

#define MODE_SVC 0x13

#define I_BIT  0x80

/*

 * use bad_save_user_regs for abort/prefetch/undef/swi ...

 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling

 */

 .macro bad_save_user_regs

 sub sp, sp, #S_FRAME_SIZE

 stmia sp, {r0 - r12}   @ Calling r0-r12

 ldr r2, _armboot_start

 sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)

 sub r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack

 ldmia r2, {r2 - r3}   @ get pc, cpsr

 add r0, sp, #S_FRAME_SIZE  @ restore sp_SVC

 add r5, sp, #S_SP

 mov r1, lr

 stmia r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr

 mov r0, sp

 .endm

 .macro irq_save_user_regs

 sub sp, sp, #S_FRAME_SIZE

 stmia sp, {r0 - r12}   @ Calling r0-r12

 add     r7, sp, #S_PC

 stmdb   r7, {sp, lr}^                   @ Calling SP, LR

 str     lr, [r7, #0]                    @ Save calling PC

 mrs     r6, spsr

 str     r6, [r7, #4]                    @ Save CPSR

 str     r0, [r7, #8]                    @ Save OLD_R0

 mov r0, sp

 .endm

 .macro irq_restore_user_regs

 ldmia sp, {r0 - lr}^   @ Calling r0 - lr

 mov r0, r0

 ldr lr, [sp, #S_PC]   @ Get PC

 add sp, sp, #S_FRAME_SIZE

 subs pc, lr, #4   @ return & move spsr_svc into cpsr

 .endm

 .macro get_bad_stack

 ldr r13, _armboot_start  @ setup our mode stack

 sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)

 sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack

 str lr, [r13]   @ save caller lr / spsr

 mrs lr, spsr

 str     lr, [r13, #4]

 mov r13, #MODE_SVC   @ prepare SVC-Mode

 @ msr spsr_c, r13

 msr spsr, r13

 mov lr, pc

 movs pc, lr

 .endm

 .macro get_irq_stack   @ setup IRQ stack

 ldr sp, IRQ_STACK_START

 .endm

 .macro get_fiq_stack   @ setup FIQ stack

 ldr sp, FIQ_STACK_START

 .endm

/*

 * exception handlers

 */

 .align  5

undefined_instruction:

 get_bad_stack

 bad_save_user_regs

 bl  do_undefined_instruction

 .align 5

software_interrupt:

 get_bad_stack

 bad_save_user_regs

 bl  do_software_interrupt

 .align 5

prefetch_abort:

 get_bad_stack

 bad_save_user_regs

 bl  do_prefetch_abort

 .align 5

data_abort:

 get_bad_stack

 bad_save_user_regs

 bl  do_data_abort

 .align 5

not_used:

 get_bad_stack

 bad_save_user_regs

 bl  do_not_used

#ifdef CONFIG_USE_IRQ

 .align 5

irq:

 get_irq_stack

 irq_save_user_regs

 bl  do_irq

 irq_restore_user_regs

 .align 5

fiq:

 get_fiq_stack

 /* someone ought to write a more effiction fiq_save_user_regs */

 irq_save_user_regs

 bl  do_fiq

 irq_restore_user_regs

#else

 .align 5

irq:

 get_bad_stack

 bad_save_user_regs

 bl  do_irq

 .align 5

fiq:

 get_bad_stack

 bad_save_user_regs

 bl  do_fiq

#endif

说明：红色部分是我个人添加的，并作了一些相关注释。

关于第一处与第二处，加上宏定义的原因是那两个灯是为在AT91RM9200的开发板上用来指示状态的，所以加上。第三处与第四处是为了让其能从nand flash启动起来。

另外特别值得注意的是那个绿色的宏，我下载的u-boot版本是1.3.3之前的最后一个1.3.2的发行版，这个地方已经改过来了，可能有些1.3.2的版本此处还是#ifndef CONFIG_AT91RM9200,那么下面的一段重定向代码将会执行，copy_loop也会执行，所以是启动不起来的。在我所下载的1.3.3中的源码中就有这个问题，即使我的1.3.3没有移植成功。

我们已经修改了start.S这个文件。接下来还需要几步修改才能启动起来。

 

1、在板级目录下新建Nand Flash的读函数文件：

emacs nand.c

然后将下面的内容粘贴进去，并且保存退出：

#include <common.h>

#include <s3c2410.h>

#include <config.h>

#define TACLS 0

#define TWRPH0 3

#define TWRPH1 0

#define U32 unsigned int

extern unsigned long nand_probe(unsigned long physadr);

static void NF_Reset(void)

{

 int i;

 NF_nFCE_L(); /* 片选Nand Flash芯片*/

 NF_CMD(0xFF); /* 复位命令 */

 for(i=0;i<10;i++); /* 等待tWB = 100ns. */

 NF_WAITRB(); /* wait 200~500us; */

 NF_nFCE_H(); /* 取消Nand Flash 选中*/

}

void NF_Init(void)

{

 /* 设置Nand Flash配置寄存器, 每一位的取值见1.3节

  * initial value is 0xf830 */

 rNFCONF=(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);

 /* 复位外部Nand Flash芯片 */

 NF_Reset();

}

 

/* 从Nand Flash中把数据读入到RAM中 */

int nand_read_whole(unsigned char *buf, unsigned long start_addr, int size)

{

 int i, j;

 /* 如果起始地址和长度不是512字节(1页)的倍数, 则返回错误代码 */

 if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {

  return 1;

 }

 /* 激活Nand Flash */

 NF_nFCE_L();

 for(i=0; i<10; i++);

 i = start_addr;

 while(i < start_addr + size) {

  /* 读A区 */

  rNFCMD = 0;

  /* 写入读取地址 */

  rNFADDR = i & 0xff;

  rNFADDR = (i >> 9) & 0xff;

  rNFADDR = (i >> 17) & 0xff;

  rNFADDR = (i >> 25) & 0xff;

  NF_WAITRB();

  /* 读出一页(512字节) */

  for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {

   *buf = (rNFDATA & 0xff);

   buf++;

  }

 }

 /* 停止驱动Nand Flash */

 NF_nFCE_H();

 return 0;

}

这个文件是严重地板级依赖的，取决于你开发板的FLASH芯片，我的是K9F1208U0B，估计很多板子都是用这个FLASH芯片。

 

2、修改s3c2410下的Makefile

emacs board/s3c2410/Makefile

 

nclude $(TOPDIR)/config.mk

LIB = $(obj)lib$(BOARD).a

COBJS := s3c2410.o flash.o nand.o

SOBJS := lowlevel_init.o

红色部分为修改的内容。

 

3、修改板级配置头文件

emacs include/configs/yys2410

在些我将我修改后的悠悠然粘贴出来：

 

/*

 * (C) Copyright 2002

 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>

 * Marius Groeger <[e-mail]>

 * Gary Jennejohn <[e-mail]>

 * David Mueller <[e-mail]>

 *

 * Configuation settings for the SAMSUNG SMDK2410 board.

 *

 * See file CREDITS for list of people who contributed to this

 * project.

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation; either version 2 of

 * the License, or (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,

 * MA 02111-1307 USA

 */

#ifndef __CONFIG_H

#define __CONFIG_H

/*

 * High Level Configuration Options

 * (easy to change)

 */

#define CONFIG_ARM920T  1 /* This is an ARM920T Core */

#define CONFIG_S3C2410  1 /* in a SAMSUNG S3C2410 SoC     */

#define CONFIG_SMDK2410  1 /* on a SAMSUNG SMDK2410 Board  */

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#define CONFIG_S3C2410_NAND_BOOT 1

#define STACK_BASE 0x33f00000

#define STACK_SIZE 0x8000

#define UBOOT_RAM_BASE 0x33f80000

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

/* input clock of PLL */

#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */

#define USE_920T_MMU  1

#undef CONFIG_USE_IRQ   /* we don't need IRQ/FIQ stuff */

/*

 * Size of malloc() pool

 */

#define CFG_MALLOC_LEN  (CFG_ENV_SIZE + 128*1024)

#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */

/*

 * Hardware drivers

 */

#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */

#define CS8900_BASE  0x19000300

#define CS8900_BUS16  1 /* the Linux driver does accesses as shorts */

/*

 * select serial console configuration

 */

#define CONFIG_SERIAL1          1 /* we use SERIAL 1 on SMDK2410 */

/************************************************************

 * RTC

 ************************************************************/

#define CONFIG_RTC_S3C24X0 1

/* allow to overwrite serial and ethaddr */

#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE  115200

/*

 * BOOTP options

 */

#define CONFIG_BOOTP_BOOTFILESIZE

#define CONFIG_BOOTP_BOOTPATH

#define CONFIG_BOOTP_GATEWAY

#define CONFIG_BOOTP_HOSTNAME

/*

 * Command line configuration.

 */

#include <config_cmd_default.h>

#define CONFIG_CMD_CACHE

#define CONFIG_CMD_DATE

#define CONFIG_CMD_ELF

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#define CONFIG_CMD_REGINFO

#define CONFIG_CMD_NAND

#define CONFIG_CMD_PING

#define CONFIG_CMD_DLF

#define CONFIG_CMD_ENV

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#define CONFIG_BOOTDELAY 3

#define CONFIG_BOOTARGS     "root=ramfs devfs=mount console=ttySA0,115200"

#define CONFIG_ETHADDR 08:00:3e:26:0a:5b

#define CONFIG_NETMASK          255.255.255.0

#define CONFIG_IPADDR  202.198.137.105

#define CONFIG_SERVERIP  10.0.0.1202.198.137.107

#define CONFIG_BOOTFILE "uImage"

#define CONFIG_BOOTCOMMAND "tftp; bootm"

#if defined(CONFIG_CMD_KGDB)

#define CONFIG_KGDB_BAUDRATE 115200  /* speed to run kgdb serial port */

/* what's this ? it's not used anywhere */

#define CONFIG_KGDB_SER_INDEX 1  /* which serial port to use */

#endif

/*

 * Miscellaneous configurable options

 */

#define CFG_LONGHELP    /* undef to save memory  */

#define CFG_PROMPT  "YYS2410 # " /* Monitor Command Prompt */

#define CFG_CBSIZE  256  /* Console I/O Buffer Size */

#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */

#define CFG_MAXARGS  16  /* max number of command args */

#define CFG_BARGSIZE  CFG_CBSIZE /* Boot Argument Buffer Size */

#define CFG_MEMTEST_START 0x30000000 /* memtest works on */

#define CFG_MEMTEST_END  0x33F00000 /* 63 MB in DRAM */

#undef  CFG_CLKS_IN_HZ  /* everything, incl board info, in Hz */

#define CFG_LOAD_ADDR  0x33000000 /* default load address */

/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */

/* it to wrap 100 times (total 1562500) to get 1 sec. */

#define CFG_HZ   1562500

/* valid baudrates */

#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------

 * Stack sizes

 *

 * The stack sizes are set up in start.S using the settings below

 */

#define CONFIG_STACKSIZE (128*1024) /* regular stack */

#ifdef CONFIG_USE_IRQ

#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */

#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */

#endif

/*-----------------------------------------------------------------------

 * Physical Memory Map

 */

#define CONFIG_NR_DRAM_BANKS 1    /* we have 1 bank of DRAM */

#define PHYS_SDRAM_1  0x30000000 /* SDRAM Bank #1 */

#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */

#define PHYS_FLASH_1  0x00000000 /* Flash Bank #1 */

#define CFG_FLASH_BASE  PHYS_FLASH_1

/*-----------------------------------------------------------------------

 * FLASH and environment organization

 */

#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */

#if 0

#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */

#endif

#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */

#ifdef CONFIG_AMD_LV800

#define PHYS_FLASH_SIZE  0x00100000 /* 1MB */

#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */

#define CFG_ENV_ADDR  (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */

#endif

#ifdef CONFIG_AMD_LV400

#define PHYS_FLASH_SIZE  0x00080000 /* 512KB */

#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */

#define CFG_ENV_ADDR  (CFG_FLASH_BASE + 0x070000) /* addr of environment */

#endif

/* timeout values are in ticks */

#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */

#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */

#define CFG_ENV_IS_IN_NAND 1 /* modify%%%%%%%%%%%%%% */

//#define CFG_ENV_SIZE  0x10000 /* Total Size of Environment Sector */

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#define CFG_ENV_SIZE  0x4000 /* Total Size of Environment Sector */

#define CFG_ENV_OFFSET  (0x80000-0x4000)

#define CONFIG_ARCH_SMDK2410 1

#define CFG_NAND_BASE 0x4E000000  /* Nand Flash控制器在SFR区中起始寄存器地址 */

#define CFG_MAX_NAND_DEVICE 1   /* 支持的最在Nand Flash数据 */

#define SECTORSIZE 512    /* 1页的大小 */

#define NAND_SECTOR_SIZE SECTORSIZE

#define NAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1) /* 页掩码 */

#define ADDR_COLUMN 1    /* 一个字节的Column地址 */

#define ADDR_PAGE 2    /* 3字节的页块地址, A9A25*/

#define ADDR_COLUMN_PAGE 3   /* 总共4字节的页块地址 */

#define NAND_ChipID_UNKNOWN 0x00  /* 未知芯片的ID号 */

#define NAND_MAX_FLOORS 1

#define NAND_MAX_CHIPS 1

/* Nand Flash命令层底层接口函数 */

#define WRITE_NAND_COMMAND(d, adr) do {rNFCMD = d;} while(0)

#define WRITE_NAND_ADDRESS(d, adr) do {rNFADDR = d;} while(0)

#define WRITE_NAND(d, adr) do {rNFDATA = d;} while(0)

#define READ_NAND(adr) (rNFDATA)

#define NAND_WAIT_READY(nand) {while(!(rNFSTAT&(1<<0)));}

#define NAND_DISABLE_CE(nand) {rNFCONF |= (1<<11);}

#define NAND_ENABLE_CE(nand) {rNFCONF &= ~(1<<11);}

/* 下面一组操作对Nand Flash无效 */

#define NAND_CTL_CLRALE(nandptr)

#define NAND_CTL_SETALE(nandptr)

#define NAND_CTL_CLRCLE(nandptr)

#define NAND_CTL_SETCLE(nandptr)

/* 允许Nand Flash写校验 */

#define CONFIG_MTD_NAND_VERIFY_WRITE 1

#ifdef CONFIG_S3C2410_NAND_BOOT

#define rNFCONF (*(volatile unsigned int *)0x4e000000)

#define rNFCMD (*(volatile unsigned char *)0x4e000004)

#define rNFADDR (*(volatile unsigned char *)0x4e000008)

#define rNFDATA (*(volatile unsigned char *)0x4e00000c)

#define rNFSTAT (*(volatile unsigned int *)0x4e000010)

#define rNFECC (*(volatile unsigned int *)0x4e000014)

#define rNFECC0 (*(volatile unsigned char *)0x4e000014)

#define rNFECC1 (*(volatile unsigned char *)0x4e000015)

#define rNFECC2 (*(volatile unsigned char *)0x4e000016)

/* 操作的函数实现

 * 1. 发送命令 */

#define NF_CMD(cmd) {rNFCMD=cmd;}

/* 2. 写入地址 */

#define NF_ADDR(addr) {rNFADDR=addr;}

/* 3. Nand Flash芯片选中 */

#define NF_nFCE_L() {rNFCONF&=~(1<<11);}

/* 4. Nand Flash芯片不选中 */

#define NF_nFCE_H() {rNFCONF|=(1<<11);}

/* 5. 初始化ECC */

#define NF_RSTECC() {rNFCONF|=(1<<12);}

/* 6. 读数据 */

#define NF_RDDATA() (rNFDATA)

/* 7. 写数据 */

#define NF_WRDATA(data) {rNFDATA=data;}

/* 8. 获取Nand Flash芯片状态 */

#define NF_WAITRB() {while(!(rNFSTAT&(1<<0)));}

/* 0/假: 表示Nand Flash芯片忙状态

 * 1/真：表示Nand Flash已经准备好

 */

#endif

/* add %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% */

#endif /* __CONFIG_H */

其中第二处红色部分，是用来配置u-boot命令的，这个与1.2.0上有很大不同，1.3.2为它专门弄了一个头文件，这样变得方便多了。

其中有一部分是关于网络配置的，你可以自己更改。

这里还有一个值得注意的地方：

u-boot运行至第二阶段进入start_armboot()函数。其中nand_init()函数是对nand flash的最初初始化函数。Nand_init()函数在两个文件中实现。其调用与CFG_NAND_LEGACY宏有关，如果没有定义这个宏，系统调用 drivers/mtd/nand/nand.c中的nand_init()；否则调用自己在drivers/mtd/nand_legacy/nand_legacy中的nand_init()函数。这里我选择第二种方式。

这样会更省事。

如果你选择第一种方式，更改的文件比较多。

 

整个移植过程就此完毕了，如果你的网卡不是CS8900，那么你还得修改一些驱动来适合这个网卡。

然后

进行make yys2410_config

再进行：make CROSS_COMPILE=arm-linux-

编译后得到u-boot.bin，烧写到flash中，打开 minicom,得到信息如下：

U-Boot 1.3.2 (Aug  4 2008 - 14:12:27)                                          

                                                                               

DRAM:  64 MB                                                                   

Flash: 512 kB                                                                  

NAND:  64 MiB                                                                  

In:    serial                                                                  

Out:   serial                                                                  

Err:   serial                                                                  

Hit any key to stop autoboot:  0                                               

YYS2410 #