Hamming ECC(Error Correction Code) in Nand Flash

【资源下载】Hamming ECC(Error Correction Code) in Nand Flash  

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【资源下载】Hamming ECC(Error Correction Code) in Nand Flash

1.Error Correction Code in NAND Flash Memories
http://www.eetasia.com/ARTICLES/2004NOV/A/2004NOV29_MEM_AN10.PDF

其中，页面： http://www.datasheetsite.com/datasheet/LP02 还有其他文档下载。

2.Application Notes

AN1821 - Garbage collection in NAND flash memories (196KB, .pdf)

AN1822 - Wear leveling in NAND flash memories (251KB, .pdf)

AN1823 - Error correction code in single level cell NAND flash memories (483KB, .pdf)

AN2365 - Migrating from a Chip Enable care to a Chip Enable don't care NAND flash memory (266KB, .pdf)

AN3054 - How to migrate from 70 nm to 57 nm technology in 1-Gbit single level cell, small page, NAND flash memory (190KB, .pdf)

Datasheet

NAND01GWxA2B-KGD: Known Good Die, 1-Gbit (x8/x16) 528-byte/264-word page, 3 V, NAND flash memory (1MB, .pdf)

NAND512-A2C: 512-Mbit (x8/x16) 528-byte/264-word page, 1.8 V/3 V, NAND flash memories (1MB, .pdf)

NAND512xxA2D_NAND01GxxA2C: 512-Mbit, 1-Gbit, 528-byte/264-word page, 1.8 V/3 V, NAND flash memories (1MB, .pdf)

NANDXXX-A: 128-Mbit or 256-Mbit, 528-byte/264-word page, 3 V, NAND flash memories (1MB, .pdf)

2.NAND Flash ECC module

NAND flash devices have rapidly become the preferred solution for high-densitystatic memory storage, particularly in mobile product applications. As systems become capable of accessing more and more memory space, larger amounts of data are stored and transferred both within systems and across networks. When storing and transferring large volumes of data, it is essential to detect and correct errors that may occur.Error correction code (ECC) fulfills this critical requirement.

The Micron ECC module was developed and tested using Xilinx Spartan-3 and can be ported to certain other platforms of the user's choosing.

ECC corrects single data bits that have changed from their original values. The Micron NAND flash ECC module detects the error, maintains ECC information, and corrects one single-bit error for each 512 bytes of data. All ECC activity is controlled by this ECC module.

In situations where the processor lacks a native NAND flash controller, it is possible to design a simple memory-mapped interface. Where the memory-mapped design provides a hardware interface to NAND, ECC is typically part of the application software and is not provided.

This technical note describes the features of the Micron NAND Flash ECC module and how it calculates and implements ECC.

View the PDF document for more information.

3.http://www.micron.com/products/nand/software/index

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4.Error correction code in NAND flash memories

This app note describes how to implement an error correction code (ECC), in STMicro NAND flash memories, which can detect 2bit errors and correct 1bit errors per 256Bytes.

View the PDF document for more information

FROM: http://blog.163.com/againinput4@yeah/blog/static/12276427120096230533711/