mpc8313erdb.dts

/*
 * MPC8313E RDB Device Tree Source
 *
 * Copyright (C) 2005-2008 Freescale Semiconductor Inc. All rights reserved.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */


/ {
model = "MPC8313ERDB";
compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
#address-cells = <1>;
#size-cells = <1>;


cpus {
#address-cells = <1>;
#size-cells = <0>;


PowerPC,8313@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;// 32 bytes
i-cache-line-size = <20>;// 32 bytes
d-cache-size = <4000>;// L1, 16K
i-cache-size = <4000>;// L1, 16K
timebase-frequency = <0>;// from bootloader
bus-frequency = <0>;// from bootloader
clock-frequency = <0>;// from bootloader
32-bit;
};
};


memory {
device_type = "memory";
reg = <00000000 08000000>;// 128MB at 0
};


nand@e2800000 {
device_type = "nand";
compatible = "fsl-nand";
reg = <e2800000 2000>;
partitions = <
00000000 00100001 /* U-BOOT 1M R0 */
00100000 00800000 /* JFFS2 8M RW */
00900000 00400001 /* RAMDISK 4M RO */
00d00000 01000000 /* Reserve 16M RW */
01d00000 00200001 /* Kernel 2M RO */
01f00000 00100001>;/* DTB 1M RO */
partition-names = "U-Boot-NAND", "JFFS2-NAND", "Ramdisk-NAND",
"Reserve-NAND", "Kernel-NAND", "DTB-NAND";
};


nor@fe000000 {
device_type = "rom";
compatible = "direct-mapped";
reg = <fe000000 00800000>; /*8MB*/
probe-type = "CFI";
bank-width = <2>;
partitions = <
00000000 00100001  /* U-BOOT  1M RO */
00100000 00200001  /* kernel 2M RO  */
00300000 00400000  /* Ramdisk/JFFS2 File system 4M RW  */
00700000 00010001  /*  DTB 64K RO */
00710000 000f0000>; /* Vitesse utilities 960K RW */
partition-names = "U-Boot", "Kernel", "rootfs", "DTB", "vsc-util" ;
};


soc8313@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00000200>;
bus-frequency = <0>;


wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <200 100>;
};


i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = < &ipic >;
dfsrr;
rtc@68 {
device_type="rtc";
compatible="dallas,ds1339";
reg=<68>;
};
};


i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = < &ipic >;
dfsrr;
};


spi@7000 {
cell-index = <0>;
device_type = "spi";
compatible = "fsl,spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = < &ipic >;
mode = "cpu";
};


/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
interrupts = <26 8>;
phy_type = "utmi_wide";
control_init = <00000280>;
sleep = <b00 00300000>;
};


mdio@24520 {
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
phy4: ethernet-phy@4 {
interrupt-parent = < &ipic >;
interrupts = <14 8>;
reg = <4>;
device_type = "ethernet-phy";
};
};


ptimer: ptimer@24e00 {
device_type = "timer";
reg = <24e00 b0>;
};


ethernet@24000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
ptimer-handle = < &ptimer >;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = < &ipic >;
fixed-link = <1 1 d#1000 0 0>;
sleep = <b00 20000000>;
fsl,magic-packet;
};


ethernet@25000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
ptimer-handle = < &ptimer >;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = < &ipic >;
phy-handle = < &phy4 >;
sleep = <b00 10000000>;
fsl,magic-packet;
};


serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = < &ipic >;
};


serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = < &ipic >;
};


pci@8500 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <


/* IDSEL 0x0E -mini PCI */
7000 0 0 1 &ipic 12 8
7000 0 0 2 &ipic 12 8
7000 0 0 3 &ipic 12 8
7000 0 0 4 &ipic 12 8


/* IDSEL 0x0F - PCI slot */
7800 0 0 1 &ipic 11 8
7800 0 0 2 &ipic 12 8
7800 0 0 3 &ipic 11 8
7800 0 0 4 &ipic 12 8>;
interrupt-parent = < &ipic >;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 90000000 90000000 0 10000000
         42000000 0 80000000 80000000 0 10000000
         01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};


crypto@30000 {
compatible = "fsl,sec2.2", "fsl,sec2.1",
"fsl,sec2.0";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
fsl,num-channels = <1>;
fsl,channel-fifo-len = <18>;
fsl,exec-units-mask = <0000004c>;
fsl,descriptor-types-mask = <0122003f>;
};


/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
ipic: pic@700 {
linux,phandle = <700>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <700 100>;
built-in;
device_type = "ipic";
};


elbc@5000 {
device_type = "elbc";
compatible = "fsl-elbc";
reg = <5000 1000>;
interrupts = <4d 8>;
interrupt-parent = < &ipic >;
};


power@b00 {
linux,phandle = <b00>;
device_type = "power";
compatible = "fsl,mpc831x-pmc", "fsl,mpc83xx-pmc";
reg = <b00 100
a00 100>;
interrupts = <50 8>;
interrupt-parent = < &ipic >;
};


timer@500 {
linux,phandle = <500>;
device_type = "timer";
compatible = "fsl,mpc831x-gtm", "fsl,mpc83xx-gtm";
reg = <500 100>;
interrupts = <48 8>;
interrupt-parent = < &ipic >;
};
};
};