/// SFRs address, * denote the register can be bit addressable.#define REG_ACC 0xe0 /// * Accumulator#define REG_B 0xf0 /// * B register#define REG_PSW 0xd0 /**< * Program Status Word * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |P |- |OV |RS0 |RS1 |F0 |AC |CY | * \b P Parity flag. set/cleared by hardware each instruction cycle to * indicate an odd/even number of 1 bits in the accumulator. * \b - User definable flag. * \b OV Overflow flag. * \b RS0 Register bank selector bit 0. * \b RS1 Register bank selector bit 1. * \b F0 Flag 0 available to the user for general purpose. * \b AC Auxiliary carry flag. * \b CY Carry flag. * * \note the value presented by RS0 and RS1 selects the corresponding register bank. * |RS1 |RS0 |Bank |Address | * |0 |0 |0 |00h - 07h | * |0 |1 |1 |08h - 0fh | * |1 |0 |2 |10h - 17h | * |1 |1 |3 |18h - 1fh | */#define REG_SP 0x81 /// Stack Pointer#define REG_DPL 0x82 /// DPTR low byte#define REG_DPH 0x83 /// DPTR high byte#define REG_P0 0x80 /// * Port 0#define REG_P1 0x90 /// * Port 1#define REG_P2 0xa0 /// * Port 2#define REG_P3 0xb0 /// * Port 3#define REG_IP 0xb8 /**< * Interrupt priority control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |PX0 |PT0 |PX1 |PT1 |PS |PT2 |- |- | * \b PX0 Defines the external Interrupt 0 priority level. * \b PT0 Defines the Timer 0 interrupt priority level. * \b PX1 Defines the External Interrupt 1 priority level. * \b PT1 Defines the Timer 1 interrupt priority level. * \b PS Defines the Serial Port interrupt priority level. * \b PT2 Define the Timer 2 interrupt priority level. * * \note If the bit is 0, the corresponding interrupt has a lower priority and if * the bit is 1 the corresponding interrupt has a higher priority. */#define REG_IE 0xa8 /**< * Interrupt enable control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |EX0 |ET0 |EX1 |ET1 |ES |ET2 |- |EA | * \b EX0 Enable or disable external Interrupt 0. * \b ET0 Enable or disable the Timer 0 overflow interrupt. * \b EX1 Enable or disable external Interrupt 1. * \b ET1 Enable or disable the Timer 1 overflow interrupt. * \b ES Enable or disable the serial port interrupt. * \b ET2 Enable or disable the Timer 2 overflow or capture interrupt. * \b EA Disables all interrupts. If EA = 0, no interrupt will be acknowledged. * If EA = 1, each interrupt source is individually enabled or disabled by * setting or clearing its enable bit. * \note In addition, for external interrupts, pins INT0 and INT1 (P3.2 and P3.3) * must be set to 1, and depending on whether the interrupt is to be level or * transition activated, bits IT0 or IT1 in the TCON register may need to be * set to 1. */#define REG_TMOD 0x89 /**< Timer/Counter mode control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |M0 |M1 |C/T |GATE|M0 |M1 |C/T |GATE| * |-------------------|-------------------| * | Timer 0 | Timer 1 | * \b M0 Mode selector bit. * \b M1 Mode selector bit. * \b C/T 计数器或定时器选择位, 置0时为定时器，使用内部时钟源，置1时为计数器使用外部 * 时钟源，从TX脚获得时钟源。 * \b GATE When TRx (in TCON) is set and GATE = 1, TIMER/COUNTERx will run only while * INTx pin is high (hardware control). When GATE = 0, TIMER/COUNTERx will run * only while TRx = 1 (software control). * |M1 |M0 |Mode |Description | * |0 |0 |0 |13-bit定时器 | * |0 |1 |1 |16-bit定时器/计数器 | * |1 |0 |2 |8-bit自动重载定时/计数器 | * |1 |1 |3 |TL0与H0分别为两个8-bit定时器，由TR0和TR1控制| * |1 |1 |3 |仅定时/计数器1人为停止定时/计数用| */#define REG_TCON 0x88 /**< * Timer/Counter control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |IT0 |IE0 |IT1 |IE1 |TR0 |TF0 |TR1 |TF1 | * \b IT0 Interrupt 0 type control bit, Set/cleared by software to specify falling * edge/low level triggered External Interrupt. * \b IE0 External Interrupt 0 edge flag. Set by hardware when External Interrupt * edge detected. Cleared by hardware when interrupt is processed. * \b IT1 Interrupt 1 type control bit. Set/cleared by software to specify falling * edge/low level triggered External Interrupt. * \b IE1 External Interrupt 1 edge flag. Set by hardware when External Interrupt * edge detected. Cleared by hardware when interrupt is processed. * \b TR0 定时器0控制位，设置1或0将开启或关闭定时器0。 * \b TF0 定时器0溢出位，定时器0溢出时由硬件置1，中断处理完后再置0。 * \b TR1 定时器1控制位，设置1或0将开启或关闭定时器1。 * \b TF1 定时器1溢出位，定时器1溢出时由硬件置1，中断处理完后再置0。 */#define REG_T2CON 0xc8 /**< * Timer/Counter 2 control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |CP/RL2|C/T2|TR2|EXEN2|TCLK|RCLK|EXF2|TF2| * \b CP/RL2 Capture/Reload flag. When set, captures will occur on negative transitions * at T2EX if EXEN2 = 1. When cleared, Auto-Reloads will occur either with Timer * 2 overflows or negative transitions at T2EX when EXEN2 = 1. When either RCLK * = 1 or TCLK = 1, this bit is ignored and the Timer is forced to Auto-Reload * on Timer 2 overflow. * \b C/T2 Timer or Counter select. cleared is Internal Timer. 1 = External Event Counter * \b TR2 Software START/STOP control for Timer 2. A logic 1 starts the Timer. * \b EXEN2 Timer 2 external enable flag. When set, allows a capture or reload to occur as * a result of negative transition on T2EX if Timer 2 is not being used to clock * the Serial Port. EXEN2 = 0 causes Timer 2 to ignore events at T2EX. * \b TCLK Transmit clock flag. When set, causes the Serial Port to use Timer 2 overflow * pulses for its transmit clock in modes 1 & 3. TCLK = 0 causes Timer 1 overflows * to be used for the transmit clock. * \b RCLK Receive clock flag. When set, causes the Serial Port to use Timer 2 overflow * pulses for its receive clock in modes 1 & 3. RCLK = 0 causes Timer 1 overflows * to be used for the receive clock. * \b EXF2 Timer 2 external flag set when either a capture or reload is caused by a negative * transition on T2EX, and EXEN2 = 1, When Timer 2 interrupt is enabled, EXF2 = 1 * will cause the CPU to vector to the Timer 2 interrupt routine. EXF2 must be cleared * by software. * \b TF2 Timer 2 overflow flag set by hardware and cleared by software. TF2 cannot be set * when either RCLK = 1 or CLK = 1. */#define REG_TH0 0x8c /// Timer/Counter 0 high byte#define REG_TL0 0x8a /// Timer/Counter 0 low byte#define REG_TH1 0x8d /// Timer/Counter 1 high byte#define REG_TL1 0x8b /// Timer/Counter 1 low byte#define REG_TH2 0xcd /// Timer/Counter 2 high byte#define REG_TL2 0xcc /// Timer/Counter 2 low byte#define REG_RCAP2H 0xcb /// T/C 2 capture register, high byte#define REG_RCAP2L 0xca /// T/C 2 capture register, low byte#define REG_SCON 0x98 /**< * Serial control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |RI |TI |RB8 |TB8 |REN |SM2 |SM1 |SM0 | * * \b RI Receive interrupt flag. Set by hardware at the end of the 8th bit * time in mode 0, or halfway through the stop bit time in the other * modes(except see SM2). Must be cleared by software. * \b TI Transmit interrupt flag. Set by hardware at the end of the 8th bit * time in mode 0, or at the beginning of the stop bit in the other * modes. Must be cleared by software. * \b RB8 In modes 2 & 3, is the 9th data bit that was received. In mode 1, if * SM2 = 0, RB8 is the stop bit that was received. In mode 0, RB8 is not * used. * \b TB8 The 9th bit that will be transmitted in modes 2 & 3. Set/cleared by * software. * \b REN Set/cleared by software to Enable/Disable reception. * \b SM2 Enables the multiprocessor communication feature in modes 2 & 3. In * mode 2 or 3, if SM2 is set to 1 then RI will not be activated if the * received 9th data bit(RB8) is 0. In mode 1, if SM2 = 1 then RI will * not be activated if a valid stop bit was not received. In mode 0, SM2 * should be 0. * \b SM1 Serial Port mode specifier. * \b SM0 Serial Port mode specifier. * * \note Serial Port Modes * |SM0 |SM1 |Mode |Description |Baud Rate | * |0 |0 |0 |Shift register|Fosc./12 | * |0 |1 |1 |8-bit UART |Variable | * |1 |0 |2 |9-bit UART |Fosc./(64|32)| * |1 |1 |3 |9-bit UART |Variable | * * <b>GENERATING BAUD RATES</b> * <b>SERIAL PORT IN MODE 0:</b> * Mode 0 has a fixed baud rate which is 1/12 of the oscillator frequency. * To run the serial port in this mode none of the Timer/Counters need to * be set up. Only the SCON register needs to be defined. * Oscillator Freq * Baud Rate = --------------- * 12 * * <b>SERIAL PORT IN MODE 1:</b> * Mode 1 has a variable baud rate. The baud rate can be generated by either * Timer 1 or Timer 2(8052 only). * * <b>USING TIMER/COUNT 1 TO GENERATE BAUD RATES:</b> * For this purpose, Timer 1 is used in mode 2 (Auto-reload). * K x Oscillator Freq * Baud Rate = ----------------------- * 32 x 12 x [256 - (TH1)] * * If SMOD = 0, then K = 1. * If SMOD = 1, then K = 2. (SMOD is the PCON register). * * Most of the time the user knows the baud rate and needs to know the reload * value for TH1. Therefore, the equation to calculate TH1 can be written as: * K x Oscillator Freq * TH1 = ------------------- * 384 x baud rate * * TH1 must be an integer value. Rounding off TH1 to the nearest integer may not * produce the desired baud rate. In this case, the user may have to choose another * crystal frequency. * * Since the PCON register is not bit addressable, one way to set the bit is logical * ORing the PCON register. * * <b>USING TIMER/COUNTER 2 TO GENERATE BAUD RATES:</b> * For this purpose, Timer 2 must be used in the baud rate generating mode. If Timer * 2 is being clocked through pin T2(P1.0) the baud rate is: * Timer 2 overflow Rate * Baud Rate = --------------------- * 16 * * And if it is being clocked internally the baud rate is: * Oscillator Freq * Baud Rate = ------------------------------- * 32 x [65536 - (RCAP2H, RCAP2L)] * * To obtain the reload value for RCAP2H and RCAP2L the above equation can be * rewritten as: * Oscillator Freq * RCAP2H, RCAP2L = 65536 - --------------- * 32 x Baud Rate * * <b>SERIAL PORT IN MODE 2:</b> * The baud rate is fixed in this mode and is 1/32 or 1/64 of the oscillator * frequency depending on the value of the SMOD bit in the PCON register. * * In this mode none of the Timers are used and the clock comes from the internal * phase 2 clock. * Oscillator Freq * If SMOD = 1, Baud Rate = --------------- * 32 * * Oscillator Freq * If SMOD = 0, Baud Rate = --------------- * 64 * * <b>SERIAL PORT IN MODE 3:</b> * The baud rate in mode 3 is variable and sets up exactly the same as in mode 1. */#define REG_SBUF 0x99 /// Serial data buffer#define REG_PCON 0x87 /**< Power Control * |B0 |B1 |B2 |B3 |B4 |B5 |B6 |B7 | * |IDL |PD |GF0 |GF1 |- |- |- |SMOD| * \b IDL idle mode bit. setting this bit activates idle mode operation. * \b PD Power down bit. setting this bit activates power down operation. * \b GF0 General purpose flag bit. * \b GF1 General purpose flag bit. * \b SMOD Double baud rate bit. if timer 1 is used to generate baud rate and SMOD = 1, * the baud rate is doubled when the serial port is used in modes 1, 2, or 3. * \note 如果同时给PD和IDL写入1，PD将优先激活。 *//// the value of each SFR after power-on or reset.#define REG_ACC_I 0x0#define REG_B_I 0x0#define REG_PSW_I 0x0#define REG_SP_I 0x07#define REG_DPL_I 0x0#define REG_DPH_I 0x0#define REG_P0_I 0xff#define REG_P1_I 0xff#define REG_P2_I 0xff#define REG_P3_I 0xff#define REG_IP_I 0x0#define REG_IE_I 0x0#define REG_TMOD_I 0x0#define REG_TCON_I 0x0#define REG_T2CON_I 0x0#define REG_TH0_I 0x0#define REG_TL0_I 0x0#define REG_TH1_I 0x0#define REG_TL1_I 0x0#define REG_TH2_I 0x0#define REG_TL2_I 0x0#define REG_RCAP2H_I 0x0#define REG_RCAP2L_I 0x0#define REG_SCON_I 0x0#define REG_SBUF_I 0x0#define REG_PCON_I 0x0/// Interrupt vector address#define INT_VECTOR_IE0 0x0003#define INT_VECTOR_TF0 0x000b#define INT_VECTOR_IE1 0x0013#define INT_VECTOR_TF1 0x001b#define INT_VECTOR_RI 0x0023#define INT_VECTOR_TI 0x0023#define INT_VECTOR_TF2 0x002b#define INT_VECTOR_EXF2 0x002b
