Documentation-arm64-booting

Documentation-arm64-booting

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Booting AArch64 Linux
启动AArch64 Linux
=====================

Author: Will Deacon <[e-mail]>
作者：威尔·迪康
Date  : 07 September 2012
日期：2012.09.07
This document is based on the ARM booting document by Russell King and
is relevant to all public releases of the AArch64 Linux kernel.

这份文件是基于Russell King编写的ARM的启动文件。相关于所有公开发布的AArch64 Linux内核。

The AArch64 exception model is made up of a number of exception levels
(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
counterpart.  EL2 is the hypervisor level and exists only in non-secure
mode. EL3 is the highest priority level and exists only in secure mode.

AArch64异常处理模块是由一系列的异常等级（EL0 - EL3）组成。
EL0和EL1分别对应安全的和非安全的等级。 EL2是Hypervisor层级，
只存在于非安全模式。 
EL3是最高优先级，只存在于安全模式中。

For the purposes of this document, we will use the term `boot loader'
simply to define all software that executes on the CPU(s) before control
is passed to the Linux kernel.  This may include secure monitor and
hypervisor code, or it may just be a handful of instructions for
preparing a minimal boot environment.

本文件的目的在于，我们将使用新术语“引导装载“，
简单地定义在LINUX内核控制之前，所有的在CPU中执行的软件。
这可能包括安全监视器和虚拟机管理程序代码，也可能只是
准备最小的引导环境的小小说明。

Essentially, the boot loader should provide (as a minimum) the
following:

1. Setup and initialise the RAM
2. Setup the device tree
3. Decompress the kernel image
4. Call the kernel image

从本质上讲，引导装载程序应提供（最低要求）
以下几点：

1。设置和初始化RAM
2。设置设备树
3。解压缩的内核映像
4。调用内核映像

1. Setup and initialise RAM
---------------------------

Requirement: MANDATORY

The boot loader is expected to find and initialise all RAM that the
kernel will use for volatile data storage in the system.  It performs
this in a machine dependent manner.  (It may use internal algorithms
to automatically locate and size all RAM, or it may use knowledge of
the RAM in the machine, or any other method the boot loader designer
sees fit.)

1。设置和初始化RAM

要求：强制性

引导加载程序有望找到并初始化所有RAM内核将用于存储在系统中的非易失性数据。
这个过程具有设备依赖性（它可能会使用内部算法
自动定位和判断所有的内存大小，或者可能使用本设备中RAM中的设定。
又或者引导加载程序的设计者认为合适的任何其他方法）。

2. Setup the device tree
-------------------------

Requirement: MANDATORY

The device tree blob (dtb) must be placed on an 8-byte boundary within
the first 512 megabytes from the start of the kernel image and must not
cross a 2-megabyte boundary. This is to allow the kernel to map the
blob using a single section mapping in the initial page tables.

2。设置设备树

要求：强制性

设备树BLOB（DTB）的首个512兆字节的内核映像必须设置8字节大小的边界。
并且边界不能2 MB。这是为了让内核在映射BLOB时使用单节映射。

3. Decompress the kernel image
------------------------------

Requirement: OPTIONAL

The AArch64 kernel does not currently provide a decompressor and
therefore requires decompression (gzip etc.) to be performed by the boot
loader if a compressed Image target (e.g. Image.gz) is used.  For
bootloaders that do not implement this requirement, the uncompressed
Image target is available instead.

3。解压缩的内核映像

要求：可选
AArch64内核目前并不提供解压缩程序。因此如果一个压缩的目标映像
例如Image.gz）被使用，需要解压缩文档（GZIP等）来引导加载器。
如果引导加载器没有落实这一要求，未解压的目标映像会暂时替代。

4. Call the kernel image
------------------------

Requirement: MANDATORY

The decompressed kernel image contains a 64-byte header as follows:

  u32 code0; /* Executable code */
  u32 code1; /* Executable code */
  u64 text_offset; /* Image load offset */
  u64 res0 = 0;
/* reserved */
  u64 res1 = 0;
/* reserved */
  u64 res2 = 0;
/* reserved */
  u64 res3 = 0;
/* reserved */
  u64 res4 = 0;
/* reserved */
  u32 magic = 0x644d5241;
/* Magic number, little endian, "ARM\x64" */
  u32 res5 = 0;       /* reserved */

Header notes:

- code0/code1 are responsible for branching to stext.

The image must be placed at the specified offset (currently 0x80000)
from the start of the system RAM and called there. The start of the
system RAM must be aligned to 2MB.

  4。调用内核映像

解压缩的内核映像包含一个64字节的头文件，如下：

  u32 code0; /* Executable code */
  u32 code1; /* Executable code */
  u64 text_offset; /* Image load offset */
  u64 res0 = 0;
/* reserved */
  u64 res1 = 0;
/* reserved */
  u64 res2 = 0;
/* reserved */
  u64 res3 = 0;
/* reserved */
  u64 res4 = 0;
/* reserved */
  u32 magic = 0x644d5241;
/* Magic number, little endian, "ARM\x64" */
  u32 res5 = 0;       /* reserved */
  
头文件注释：

- code0/code1的负责分支STEXT。

图像必须放置在RAM中指定的开始偏移量（目前为0x80000）上，并从那里调用。
系统RAM的开始必须对齐到2MB处。

Before jumping into the kernel, the following conditions must be met:

- Quiesce all DMA capable devices so that memory does not get
  corrupted by bogus network packets or disk data.  This will save
  you many hours of debug.

- Primary CPU general-purpose register settings
  x0 = physical address of device tree blob (dtb) in system RAM.
  x1 = 0 (reserved for future use)
  x2 = 0 (reserved for future use)
  x3 = 0 (reserved for future use)

- CPU mode
  All forms of interrupts must be masked in PSTATE.DAIF (Debug, SError,
  IRQ and FIQ).
  The CPU must be in either EL2 (RECOMMENDED in order to have access to
  the virtualisation extensions) or non-secure EL1.

- Caches, MMUs
  The MMU must be off.
  Instruction cache may be on or off.
  Data cache must be off and invalidated.
  External caches (if present) must be configured and disabled.

- Architected timers
  CNTFRQ must be programmed with the timer frequency.
  If entering the kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0)
  set where available.

- Coherency
  All CPUs to be booted by the kernel must be part of the same coherency
  domain on entry to the kernel.  This may require IMPLEMENTATION DEFINED
  initialisation to enable the receiving of maintenance operations on
  each CPU.

- System registers
  All writable architected system registers at the exception level where
  the kernel image will be entered must be initialised by software at a
  higher exception level to prevent execution in an UNKNOWN state.

在进入内核之前，必须满足以下条件：

- 静默带有DMA功能的设备，使得该内存不会被
  虚假的数据包或磁盘上的数据损坏。这将节省
  你数个小时的调试时间。

- 主CPU通用寄存器设置
  X0 = 设备树在RAM中的物理地址。
  X1 = 0（保留供将来使用）
  X2 = 0（保留供将来使用）
  ×3 = 0（保留供将来使用）

- CPU模式
  所有形式的中断必须被屏蔽PSTATE.DAIF（调试、SError、IRQ和FIQ）。
  CPU必须在任何EL2（建议以安全模式访问）或者非安全的EL1。

 - 高速缓存，MMU
   MMU必须关闭。
   指令缓存可以是开启的或关闭的。
   数据高速缓存必须关闭并失效。
   必须配置和禁用外部缓存（如果存在的话）。

- 架构的定时器
  在编程中CNTFRQ必须与定时器的频率相同。
  如果在EL1，CNTHCTL_EL2的安全等级下进入内核，
  必须将EL1PCTEN的位设置为0。
  
  - 一致性
  由内核启动所有的CPU必须通过相同的
  域进入内核。这可能需要实现定义初始
  化，以使每个CPU接收的维护操作。
  
  - 系统寄存器
  所有可编辑的架构系统寄存器所在的内核映像，
  如果是能被进入的。那么该寄存器必须经过软件初始化
  至一个较高的异常水平以防止未知状态下的误执行。
  
The boot loader is expected to enter the kernel on each CPU in the
following manner:

- The primary CPU must jump directly to the first instruction of the
  kernel image.  The device tree blob passed by this CPU must contain
  for each CPU node:

    1. An 'enable-method' property. Currently, the only supported value
       for this field is the string "spin-table".

    2. A 'cpu-release-addr' property identifying a 64-bit,
       zero-initialised memory location.

  It is expected that the bootloader will generate these device tree
  properties and insert them into the blob prior to kernel entry.

- Any secondary CPUs must spin outside of the kernel in a reserved area
  of memory (communicated to the kernel by a /memreserve/ region in the
  device tree) polling their cpu-release-addr location, which must be
  contained in the reserved region.  A wfe instruction may be inserted
  to reduce the overhead of the busy-loop and a sev will be issued by
  the primary CPU.  When a read of the location pointed to by the
  cpu-release-addr returns a non-zero value, the CPU must jump directly
  to this value.

- Secondary CPU general-purpose register settings
  x0 = 0 (reserved for future use)
  x1 = 0 (reserved for future use)
  x2 = 0 (reserved for future use)
  x3 = 0 (reserved for future use)

引导加载器有望通过如下方式进入任意CPU的内核：

- 主CPU必须跳转至内核映像的第一条指令。
  通过这个CPU的设备树BLOB必须包含每个CPU节点：
  
  1.   启用方法。目前，唯一支持此字段的值是字符串“自旋表”。
  2.   CPU地址释放，识别一个64位内存位置并对其零初始化。

- 次级CPU通用寄存器设置
X0 =0（保留供将来使用）
X1= 0（保留供将来使用）
X2= 0（保留供将来使用）
×3= 0（保留供将来使用）