LCD Overlays

http://processors.wiki.ti.com/index.php/Linux_Core_DSS_User%27s_Guide

Hardware Architecture

The Display Subsystem (DSS) is a hardware block responsible for fetching video and graphic images from memory, and display it on to a LCD or TV setup through various standard interfaces. It sounds like a simple block, but it actually isn't (consider looking at TRM for more details). DSS hardware has 2 major sub-blocks: DISPC and the encoders. In addition to the SoC's DSS, boards often contain external encoders (for example, DPI to DVI encoder) and display panels.

Simplified example setup where two overlays are merged into one output, which is encoded into DSI, then to LVDS, and shown on an LVDS panel.

An overview of the DSS hardware. The arrows show how ovlerlays/pipelines are connected to overlay managers, which are further connected to encoders, which finally create an encoded pixel stream for display on to LCD or TV. The different colors of the blocks show the new sub-blocks added in subsequent DSS revisions

1. Display Controller(DISPC)

DISPC is the block which is responsible of fetching image buffers from the memory through DMA pipelines, and then create a pixel stream for the encoder. The pixel stream comprises of a composition of one or more image layers which we finally want to present on the display. DISPC can be split into 2 major sub-blocks:

1. Overlays

Overlays (or Pipelines or DMA channels) consist of the HW block which perform DMA to fetch image pixels (of different color formats) from RAM. Besides performing DMA, overlays perform other functions like replication, ARGB expansion, scaling, color conversion, VC1 range mapping on the input pixels before it's passed on to the overlay manager. An overlay manager recieves pixel data from one or more such pipelines, and performs the task of composing them and passing it on to the encoder.

There are 2 different types of overlays:

Graphic overlays: These overlays are capable of fetching RGB color formats, and also bitmap formats through LUTs. They don't support scaling or color conversion and are generally intended to display a layer renderded by a GPU according to the size of the display.

Color formats supported: BITMAP 1-bpp, BITMAP 2-bpp, BITMAP 4-bpp, BITMAP 8-bpp, xRGB12-4444, RGBx12-4444, ARGB16-4444, RGBA16-4444, RGB16-565, xRGB16-1555, ARGB16-1555, xRGB24-8888, RGBx24-8888, RGB24-888, ARGB32-8888, RGBA32-8888, BGRA32-8888.

Video overlays: These overlays are capable of fetching RGB and YUV color formats. They support scaling and color conversion. They are intended for displaying video content coming from a decoder block.

Color formats supported: The RGB formats as above, UYUV4:2:2, YUV2 4:2:2, YUV4:2:0 – NV12, YUV4:2:0 – NV21 (NV12/NV21 isn't supported in older DSS revisions).

The number of overlays within DSS varies with the DSS revision used in the SoC. Below is the information for the following SoCs:

OMAP2/3/AM437x: One Graphics (GFX) and Two Video overlays (VID1, VID2).OMAP4/5/DRA7x/AM57xx: One Graphics (GFX) and Three Video overlays (VID1, VID2, and VID3).

2. Overlay Managers (Compositors and timing generators):

Overlay managers are the blocks which take ARGB image content from one or more overlays, layer them to form a composition, and create a pixel stream with the timings as per required by the encoder/panel. It has 2 functions:

Compositor: These take ARGB data from multiple overlays, composing them on the basis of their position with respect to the complete overlay manager size. Tasks like alpha blending, color-keying, z-order and color phase rotation, dithering are also performed by the compositor in the overlay manager.

Timing generator: This part of the overlay manager is responsible of providing the pixel stream generated by the compositor above according to the timings desired by the encoder or the panel. The timing generator is a state machine which provides RGB data along with control signals like pixel clock, hsync, vsync, data enable. This timing info is used by the encoder/panel to display the composited frame on the screen.

There are 2 types of overlay managers:

LCD managers: These are primarily used for encoders like DPI, DSI and RFBI and which connect to LCD panels. The timing generator derives its pixel clock from either the DSS functional clock, or a PLL within the DSS.

TV managers: These are primarily used for encoders like HDMI and VENC which connect to TV and monitors. The timing generator derives gets the pixel clock from the connected encoder.

The number of overlay managers within DSS varies with the DSS revision used in the SoC. Below is the information for the following SoCs:

OMAP2/3/AM437x: One LCD manager (LCD) and One TV manager (TV)OMAP4: 2 LCD managers (LCD1, LCD2) and One TV manager (TV)OMAP5/DRA7x/AM57xx/: 3 LCD managers (LCD1, LCD2, LCD3) and One TV manager (TV)