IIC

Timing diagram[edit]

1. Data Transfer is initiated with a START bit (S) signaled by SDA being pulled low while SCL stays high.
2. SDA sets the 1st data bit level while keeping SCL low (during blue bar time.)
3. The data is sampled (received) when SCL rises (green) for the first bit (B1).
4. This process repeats, SDA transitioning while SCL is low, and the data being read while SCL is high (B2, Bn).
5. A STOP bit (P) is signaled when SDA is pulled high while SCL is high.

In order to avoid false marker detection, SDA is changed on the SCL falling edge and is sampled and captured on the rising edge of SCL.

Applications[edit]

I²C is appropriate for peripherals where simplicity and low manufacturing cost are more important than speed. Common applications of the I²C bus are:

• Reading configuration data from SPD EEPROMs on SDRAM, DDR SDRAM, DDR2 SDRAM memory sticks (DIMM) and other stacked PC boards
• Supporting systems management for PCI cards, through an SMBus 2.0 connection.
• Accessing NVRAM chips that keep user settings.
• Accessing low speed DACs and ADCs.
• Changing contrast, hue, and color balance settings in monitors (Display Data Channel).
• Changing sound volume in intelligent speakers.
• Controlling OLED/LCD displays, like in a cellphone.
• Reading hardware monitors and diagnostic sensors, like a CPU thermistor^{[citation needed]} or fan speed.^[6]
• Reading real-time clocks.
• Turning on and turning off the power supply of system components.^[7]

A particular strength of I²C is the capability of a microcontroller to control a network of device chips with just two general purpose I/O pins and software. Many other bus technologies used in similar applications, such as Serial Peripheral Interface Bus, require more pins and signals to connect devices.