Chapter 7 Input/Output

1. Keyboard and Monitor
   • The most common means of computer/user is keyboard and monitor
   • Keyboard working principle (A/D)
   • • A key → an electronic signal à bit pattern (transducer)
     • Bit pattern →I/O modular
     • Processed and stored as ASCⅡ in computer
   • Monitor working as output (D/A)
   • • On the contrary
2. Disk drive
   • Contain two types of electronics
   • One type for exchanging data, control and status signals with an I/O module
   • The other for controlling the disk read/write mechanism
3. Input/Output module
   • Interface to CPU and Memory
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4. Functions of I/O module
   • Control and Timing
   • CPU ~ I/O communication, Device ~ I/O communication, Memory ~ I/O communication
   • • Command decoding
     • Data exchange
     • Status reporting
     • Address recognition
   • Data buffering: An important role of I/O modular
   • Error detection
5. I/O steps
   1. CPU checks I/O module and device status
   2. I/O module returns status
   3. If ready, CPU requests data transfer
   4. I/O module gets data from device
   5. I/O module transfers data to CPU
      • Programmed-I/O
      • • Data are exchanged between the CPU and I/O modular
        • CPU controls over I/O directly in a program
        • Waste CPU time: CPU waits for I/O module to complete operation when it issues an I/O command
        • I/O mapping
        • • Memory mapped I/O
          • • Devices and memory share an address space
            • • Use a flag bit
            • Large selection of devices available
          • Isolated I/O
          • • Separated address spaces
            • Limited set
        • Advantage:
        • • Simple
        • Disadvantage:
        • • Polling overhead can consume a lot of CPU time
      • Interrupt-driven I/O
      • • Characteristics:
        • • Overcomes CPU waiting
          • No repeated CPU checking of device
          • I/O module interrupts when ready
        • Steps:
        • • CPU issues read command, and then do other things
          • I/O module gets data from peripheral whilst CPU does other work
          • I/O module interrupts CPU
          • CPU requests data
          • I/O module transfers data through bus
          • At last, CPU recover previous work
        • Solutions
        • • Hardware solution
          • • Multiple interrupt lines: limits number of devices
          • Software solution
          • • Slow
          • Daisy chain or Hardware poll bus
          • Arbitration
          • Multiple interrupts processing
          • • With multiple lines, each interrupt line has a priority
            • • Higher priority lines can interrrupt lower priority lines
          • • With software polling, the order in which modules are polled determines their priority
            • With daisy, the order of modules on the daisy determines their priority
      • DMA: a more efficient technique for large volumes of data
      • • In programmed I/O & Interrupted-driven I/O, data transfer must traverse CPU
        • • Transfer rate is limited
          • CPU is tied up
        • DMA controller takes over from CPU for I/O
        • • Transfer blocks of data to or from memory without CPU intervention
          • Three modes of data transfer between CPU and DMA
          • • Block transfer mode(Monopolistic mode)
            • • An entire block of data is transferred in one contiguous sequence
              • If DMA transfers data, CPU be disabled for a duration until DMA releases bus
            • Cycle stealing mode: DMA controller takes over bus for a  cycle(Not an interrupt(CPU does not switch context))
            • • DMA uses the bus only when CPU does not need it or forcing CPU to suspend operation temporarily
              • DMA transfer one word of data, then release the bus
            • Transparent mode(alternate mode)
            • • DMA and CPU use bus by division time multiplexing
              • Require most time, but the most efficient
          • DMA operation
          • • Preprocessing: CPU tells DMA controller
            • Data transferring
            • Postprocessing: DMA controller sends interrupt when finished
            • (CPU involves only at the beginning and the end of the operation)
          • DMA configurations
          • • Single bus, detached DMA controller
            • • CPU is suspended twice(Each transfer uses bus twice: I/O to DMA, DMA to memory)
              • 
            • Single bus, integrated DMA controller
            • • CPU is suspended once
              • 
            • Separate I/O bus
            • • 
            • 
              
      • I/O Channel: an I/O module with its own processor which can execute I/O program(An extension of the DMA concept)(Has the ability to execute I/O instructions and control the I/O operations)
      • • Functions
        • • Receive command from CPU
          • Load I/O program from memory, send commands to device
          • Buffer, control and transfer data, provide path for transferring
          • Report device status or interrupt
        • Types
        • • Selector channel(Max value)
          • • At any one time, only one device is selected to transfer data
            • High-speed devices
            • 
          • Multiplexor channel
          • • Byte multiplexor channel(Number of devices)
            • • Round robon between devices
              • For a device, only one byte data is transferred
              • For low-speed devices
            • Block multiplexor channel(Max value)
            • • Round robin between devices
              • For a device, K bytes data are transferred
            • 
      • I/O processor
      • • I/O processor + local memory
6. External interface
   • Connecting devices together
   • • Point to point: dedicated line(keyboard, modem)
     • Point to multi-point: external buses(CD-ROMs, video, audio)
   • Serial or parallel