Chapter 16 Control Unit Operation
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- Micro-operations
- An instruction cycle:
- Fetch sub cycle
- Access PC,PC contains address of next instruction
- Address moved toMAR
- Address placed on address bus
- Control unit requests memory read
- Result placed on data bus, copied toMBR
- Then, toIR
- MBR is now free for further data fetches
- MeanwhilePC incremented by "1"(Determined by the length of instructions)
- in parallel with data fetch from memory
- Indirect cycle
- t1: MARß (IRaddress) - address field of IR,
- t2: Rß 1, MBR ß (memory)
- t3: IRaddressß MBR
- Interrupt cycle
- t1: MBRß(PC)
- t2: MARßsave-address,PCßroutine-address
- t3: Wß 1, memoryß (MBR)
- Execute sub cycle: different for each instruction
- The steps in sub cycles are called micro-operations
- Micro-operations are the atomic operations of a processor
- Rules for clock cycle grouping
- Proper sequence must be followed
- Conflicts must be avoided
- PC ++: involving addition
- May need addtional micro-operations
- Instruction cycle
- A new 2-bit register called the instruction cycle code(ICC) is assumed
- ICC =
- 00: fetch
- 01: indirect
- 10: execute
- 11: interrupt
- Control of the processor
- Basic element of processor
- ALU
- Registers
- Internal data paths
- External data paths
- Control unit
- Types of micro-operation
- Data transfer
- Perform arithmetic or logical ops
- Functions of control unit
- Sequencing: causes the processor to step through a series of micro-operationsin the proper sequence
- Execution: causes each micro-operation to be performed
- Control signals
- Input
- Clock
- Instruction register
- Flags:
- Determine the state of CPU
- Control signals from control bus
- Interrupts
- Output
- Control signals to CPU
- Control signals to control bus
- Conclusions on the control unit
- The control unit is the engine that runs the entire computer
- It controls everything with a few controls
- Sequencing micro-ops
- Execute some micro-ops
- Internal processor organization
- In CPU, usually a single internal bus exists
- Gates control the movement of data onto and off the bus
- Control signals control data transfer to and from external system bus
- Temporary registers may need for proper operation of ALU, except for AC:
- Input register: Y
- Temporary output register: Z
- Hardwired implementation
- Hardwired implementation:
- Can be expressed by boolean expression
- Can be implemented in combinational circuit: rather complex
- Pros:
- Higher speed operation
- Suitable for smaller implementations
- Favored approach in RISC style designs
- Cons:
- Complex sequencing & micro-operation logic
- Difficult to design and test
- Inflexible design
- Difficult to add new instructions(repetitive of 3rd?)
- Micro-programmed implementation: simpler approach
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