实体（Entity）

实体（Entity）

一个实体用来描述设计和外部世界的接口。

An entity defines the interface between a design and the outside world.

语法（Syntax）

entity 实例名 is [ generic ( 类属表); ] [ port ( 端口表); ][ 实例声明][ begin并行语句]end [ entity ] [ 实例名]; 

entity entity_name is [ generic ( generic_list ); ] [ port ( port_list ); ][ entity_declarations ][ beginconcurrent_statements ]end [ entity ] [ entity_name ]; 

说明（Description）

一个实例要结合结构体来使用。他们一起用来描述硬件层次块（一个设计实体）的行为或者结构。一个结构体只能指派给一个实体，但是一个实体可以拥有多个结构体。

An entity is used in combination with an architecture. Together they describe the behaviour or structure of an hierarchical block of hardware (a design entity). The architecture can be assigned to one entity only but one entity may be assigned to multiple architectures.
实体定义了设计的名字。另外，实体中定义的类属可以为设计提供静态信息（如时间参数或者总线宽度），端口可以为设计和环境之间提供通讯通道。
The entity declares the design name. In addition, it defines generics which provide static information (like timing parameters or bus width) to a design, and ports which provide communication channels between the design and its environment.
实体可以由库（library）和use语句来事先声明。这种方式下，所有在一个包（package）中的声明定义，对所有的实体以及所有指定到实体的结构体可见。
The entity declaration may be preceded by the library and use clauses. This way all declarations defined in a package will be visible for the entity and all architectures assigned to it.

示例（Example）

library ieee;use ieee.std_logic_1164.all;  entity BCD_Decoder is  generic (Size: integer := 4);  port (BCD: in std_logic_vector(2 downto 0);        Enable: in std_logic;        LED: out std_ulogic_vector (Size-1 downto 0));   constant Zero: std_ulogic_vector(Size-1 downto 0) := (others => '0');begin  assert (BCD /= "111") report "BCD is 7" severity note;end BCD_Decoder;

注释（Notes）

• 一个实体可以没有类属、端口和语句。实际上，这种用法被用来构建测试程序（testbenches）。
• It is possible to write an entity without any generics, ports and statements. In fact this is used in constructing testbenches.