Interrupts on the Zynq SoC

Note: The following post is based on the article “How to Use Interrupts on the Zynq SoC” by Adam Taylor, which appears in the hot-off-the pressXcell Journal, issue 87. Adam contributes frequentlyto Xcell Journal and has published nearly 30 instalments of his “MicroZed Chronicles” series in Xcell Journal. He recently became Head of Engineering for Systems at e2v Technologies.

Real-time designs often require an interrupt-driven approach simply because many systems will have a number of inputs (for example keyboards, mice, pushbuttons, sensors and the like) that will at times require processing. Inputs from these devices are generally asynchronous to the process or task currently executing, so you cannot always predict when the event will occur.

As processors get more advanced, there are a number of sources interrupts can come from. The Zynq SoC uses a Generic Interrupt Controller (GIC) to processinterrupts. The GIC handlesinterrupts from the following sources:

• Software-generated interrupts – There are 16 suchinterrupts for each processor. They caninterrupt one or both of the Zynq SoC’s ARM Cortex-A9 processor cores.
• Shared peripheral interrupts – Numbering 60 in total, theseinterrupts can come from the I/O peripherals, orto and from the programmable logic (PL) side of the device. They are shared between the Zynq SoC’s two CPUs.
• Private peripheral interrupts – The fiveinterrupts in this category are privateto each CPU—for example CPU timer, CPU watchdog timer and dedicatedPL-to-CPUinterrupt.

The following diagram shows the GIC residing in the heart of the Zynq SoC’s PS (processing system). The Zynq GIC is circled in red.

The shared peripheral interrupts are very interesting, as they are very flexible. They can be routedto either CPU from the I/O peripherals (44interrupts in total) or from the FPGA logic (16interrupts in total). However, it is also possibleto routeinterrupts from the I/O peripheralsto the programmable logic side of the device.

Interrupts are supported and can be implemented on a bare-metal system using the standalone board support package (BSP) within the Xilinx Software Development Kit (SDK). The BSP contains a number of functions that greatly ease this task of creating an interrupt-driven system. They are provided within the following header files:

• Xparameters.h – This file contains the processor’s address space and the device IDs.
• Xscugic.h – This file holds the drivers for the configuration and use of the GIC.
• Xil_exception.h – This file contains exception functions for the Cortex-A9.

The Zynq SoC has a number of timers and watchdogs available. These are either privateto a CPU or a shared resource availableto both CPUs.Interrupts are required if you are to use these components efficiently in your design. The timers and watchdogs include the following:

• CPU 32-bit timer (SCUTIMER), clocked at half the CPU frequency
• CPU 32-bit watchdog (SCUWDT), clocked at half the CPU frequency
• Shared 64-bit global timer (GT), clocked at half the CPU frequency (each CPU has its own 64-bit comparator; it is used with the GT, which drives a privateinterrupt for each CPU)
• System watchdog timer (WDT), which can be clocked from the CPU clock or an external source
• A pair of triple timer counters (TTCs), each containing three independent timers. The TTCs can be clocked by the CPU clock or by means of an external source from the MIO or EMIO in the programmable logic.

Many engineers initially approach an interrupt-driven system design with trepidation. However, the Zynq SoC’s architecture, with the GenericInterrupt Controller coupled with the drivers provided with the SDK, enables youto get aninterrupt-driven system up and running very quickly and efficiently.

To see more detailed information on using the Zynq SoC’sinterrupts including code samples, read the full version of Adam Taylor’s article by clicking    here  .

Read more about the using the Zynq in Adam Taylor’s “MicroZed Chronicles”:

Zynq DMA Part Two – Adam Taylor’s MicroZed Chronicles Part 29

The ZynqPS/PL, Part Eight: Zynq DMA – Adam Taylor’s MicroZed Chronicles Part 28

The ZynqPS/PL, Part Seven: Adam Taylor’s MicroZed Chronicles Part 27

The ZynqPS/PL, Part Six: Adam Taylor’s MicroZed Chronicles Part 26

The ZynqPS/PL, Part Five: Adam Taylor’s MicroZed Chronicles Part 25

The ZynqPS/PL, Part Four: Adam Taylor’s MicroZed Chronicles Part 24

The ZynqPS/PL, Part Three: Adam Taylor’s MicroZed Chronicles Part 23

The ZynqPS/PL, Part Two: Adam Taylor’s MicroZed Chronicles Part 22

The ZynqPS/PL, Part One: Adam Taylor’s MicroZed Chronicles Part 21

Introductionto the Zynq Triple Timer Counter Part Four: Adam Taylor’s MicroZed Chronicles Part 20

Introductionto the Zynq Triple Timer Counter Part Three: Adam Taylor’s MicroZed Chronicles Part 19

Introductionto the Zynq Triple Timer Counter Part Two: Adam Taylor’s MicroZed Chronicles Part 18

Introductionto the Zynq Triple Timer Counter Part One: Adam Taylor’s MicroZed Chronicles Part 17

The Zynq SoC’s Private Watchdog: Adam Taylor’s MicroZed Chronicles Part 16

Implementing the Zynq SoC’s Private Timer: Adam Taylor’s MicroZed Chronicles Part 15

MicroZed Timers, Clocks and Watchdogs: Adam Taylor’s MicroZed Chronicles Part 14

More About MicroZedInterrupts: Adam Taylor’s MicroZed Chronicles Part 13

MicroZedInterrupts: Adam Taylor’s MicroZed Chronicles Part 12

Using the MicroZed Button for Input: Adam Taylor’s MicroZed Chronicles Part 11

Driving the Zynq SoC's GPIO: Adam Taylor’s MicroZed Chronicles Part 10

Meet the Zynq MIO: Adam Taylor’s MicroZed Chronicles Part 9

MicroZed XADC Software: Adam Taylor’s MicroZed Chronicles Part 8

Getting the XADC Running on the MicroZed: Adam Taylor’s MicroZed Chronicles Part 7

A Boot Loader for MicroZed. Adam Taylor’s MicroZed Chronicles, Part 6

Figuring out the MicroZed Boot Loader – Adam Taylor’s MicroZed Chronicles, Part 5

Running your programs on the MicroZed – Adam Taylor’s MicroZed Chronicles, Part 4

Zynq and MicroZed say “Hello World”-- Adam Taylor’s MicroZed Chronicles, Part 3

Adam Taylor’s MicroZed Chronicles: Setting the SW Scene

Bringing up the Avnet MicroZed with Vivado