静态随机存储器

代码：

module sram(clk, data, addr, we, q);input clk;input [7:0] data;input [7:0] addr;input we;output reg [7:0] q;reg [7:0] mem [255:0];//memory的寻址范围是0到255initial begin$readmemb("ram_init.txt", mem);endalways @ (posedge clk)beginif(we)mem[addr] <= data;//执行写操作的时候，memory的地址得到数据elseq <= mem[addr];endendmodule

testbench：

`timescale 1ns/1psmodule sram_tb;reg clk;reg [7:0] data, addr;reg we;wire [7:0] q;integer i;sram dut(.clk(clk), .data(data), .addr(addr), .we(we), .q(q));initial beginclk = 1;data = 0;addr = 0;we = 0;//for(i=0; i<256; i=i+1) dut.mem[i] = i;#200.1for(i=0; i<256; i=i+1) #20 addr = i;#200for(i=0; i<256; i=i+1) begin#20 addr = i; we = 1; data = i;end#20 we = 0;#200for(i=0; i<256; i=i+1) #20 addr = i;#100 $stop;endalways #10 clk = ~clk;endmodule

modelsim:

写：

读：