AB1601编译优化参数引发的问题

来源：互联网发布：棋牌源码论坛编辑：程序博客网时间：2024/06/05 20:49

现象：优化级别为-Os时，lcd不显示，spi接口波形信号有偏差。为-O0时显示正常。

相关代码：

void DRV_SPI_No_Wait_WriteRead (uint8_t* txbuf, uint16_t txsize, uint8_t* rxbuf, uint16_t rxsize)
{
SPI.TXSRCADDR.reg = (uint32_t)txbuf;
SPI.RXDSTADDR.reg = (uint32_t)rxbuf;
SPI.TBC.reg = txsize;
SPI.RBC.reg = rxsize;
SPI.TXFIFOSZ.reg = txsize + 1;
SPI.RXFIFOSZ.reg = rxsize + 1;
SPI.TXWPTR.field.PTR = txsize;

SPI.RXRPTR.field.PTR = 0;

SPI.CONTROL.field.START = 1;

while(! SPI.STATUS.field.READY);
}

void LcdSpiWriteOneByte(U8 regData)
{
U8 spi_tx_buf[256];
spi_tx_buf[0] = regData;

SPI.TXSRCADDR.reg = (uint32_t)spi_tx_buf;
SPI.RXDSTADDR.reg = (uint32_t)SpiRxBuf;
SPI.TBC.reg = 1;
SPI.RBC.reg = 0;
SPI.TXFIFOSZ.reg = 1 + 1;
SPI.RXFIFOSZ.reg = 0 + 1;
SPI.TXWPTR.field.PTR = 1;

SPI.RXRPTR.field.PTR = 0;

SPI.CONTROL.field.START = 1;

while(! SPI.STATUS.field.READY);
}

-Os时汇编码：

000940a0 <LcdSpiWriteOneByte>:
940a0: fc 00 push25 $r6,#0x0 ! {$r6, $fp, $gp, $lp}
940a2: ef 00 addi10.sp #-256
940a4: 46 00 02 18 sethi $r0,#0x218
940a8: 58 00 00 00 ori $r0,$r0,#0x0
940ac: 3e 18 05 4c addi.gp $r1,#1356
940b0: 15 f0 00 13 swi $sp,[$r0+#0x4c]
940b4: 84 40 movi55 $r2,#0
940b6: 14 10 00 16 swi $r1,[$r0+#0x58]
940ba: 84 21 movi55 $r1,#1
940bc: 14 10 00 14 swi $r1,[$r0+#0x50]
940c0: 14 20 00 17 swi $r2,[$r0+#0x5c]
940c4: 84 42 movi55 $r2,#2
940c6: 14 20 00 12 swi $r2,[$r0+#0x48]
940ca: 14 10 00 15 swi $r1,[$r0+#0x54]
940ce: 46 2f ff 00 sethi $r2,#0xfff00
940d2: a0 45 lwi333 $r1,[$r0+#0x14]
940d4: fe 56 and33 $r1,$r2
940d6: 58 10 80 01 ori $r1,$r1,#0x1
940da: a8 45 swi333 $r1,[$r0+#0x14]
940dc: a0 47 lwi333 $r1,[$r0+#0x1c]
940de: fe 56 and33 $r1,$r2
940e0: a8 47 swi333 $r1,[$r0+#0x1c]
940e2: b4 20 lwi450 $r1,[$r0]
940e4: 58 10 80 04 ori $r1,$r1,#0x4
940e8: b6 20 swi450 $r1,[$r0]
940ea: 04 10 00 0c lwi $r1,[$r0+#0x30]
940ee: 96 4c xlsb33 $r1,$r1
940f0: c1 fd beqz38 $r1,940ea <LcdSpiWriteOneByte+0x4a>
940f2: ed 00 addi10.sp #256
940f4: fc 80 pop25 $r6,#0x0 ! {$r6, $fp, $gp, $lp}

00094052 <DRV_SPI_No_Wait_WriteRead>:
94052: fc 00 push25 $r6,#0x0 ! {$r6, $fp, $gp, $lp}
94054: 46 40 02 18 sethi $r4,#0x218
94058: 58 42 00 00 ori $r4,$r4,#0x0
9405c: 96 49 zeh33 $r1,$r1
9405e: 96 d9 zeh33 $r3,$r3
94060: 14 02 00 13 swi $r0,[$r4+#0x4c]
94064: 14 22 00 16 swi $r2,[$r4+#0x58]
94068: 9c 09 addi333 $r0,$r1,#1
9406a: 14 12 00 14 swi $r1,[$r4+#0x50]
9406e: 14 32 00 17 swi $r3,[$r4+#0x5c]
94072: 9c d9 addi333 $r3,$r3,#1
94074: 14 02 00 12 swi $r0,[$r4+#0x48]
94078: 14 32 00 15 swi $r3,[$r4+#0x54]
9407c: 46 2f ff 00 sethi $r2,#0xfff00
94080: a0 25 lwi333 $r0,[$r4+#0x14]
94082: fe 16 and33 $r0,$r2
94084: fe 47 or33 $r1,$r0
94086: a8 65 swi333 $r1,[$r4+#0x14]
94088: a0 27 lwi333 $r0,[$r4+#0x1c]
9408a: fe 16 and33 $r0,$r2
9408c: a8 27 swi333 $r0,[$r4+#0x1c]
9408e: b4 04 lwi450 $r0,[$r4]
94090: 58 00 00 04 ori $r0,$r0,#0x4
94094: b6 04 swi450 $r0,[$r4]
94096: 04 02 00 0c lwi $r0,[$r4+#0x30]
9409a: 96 04 xlsb33 $r0,$r0
9409c: c0 fd beqz38 $r0,94096 <DRV_SPI_No_Wait_WriteRead+0x44>
9409e: fc 80 pop25 $r6,#0x0 ! {$r6, $fp, $gp, $lp}

-O0时汇编码：

0009411c <LcdSpiWriteOneByte>:
9411c: fc 00 push25 $r6,#0x0 ! {$r6, $fp, $gp, $lp}
9411e: ee f8 addi10.sp #-264
94120: 10 0f 80 04 sbi $r0,[$sp+#0x4]
94124: b0 02 addri36.sp $r0,#0x8
94126: 00 1f 80 04 lbi $r1,[$sp+#0x4]
9412a: ae 40 sbi333 $r1,[$r0+#0x0]
9412c: b0 02 addri36.sp $r0,#0x8
9412e: 46 f0 02 18 sethi $r15,#0x218
94132: 14 07 80 13 swi $r0,[$r15+#0x4c]
94136: 3e 08 05 4c addi.gp $r0,#1356
9413a: 46 f0 02 18 sethi $r15,#0x218
9413e: 14 07 80 16 swi $r0,[$r15+#0x58]
94142: 84 01 movi55 $r0,#1
94144: 46 f0 02 18 sethi $r15,#0x218
94148: 14 07 80 14 swi $r0,[$r15+#0x50]
9414c: 84 00 movi55 $r0,#0
9414e: 46 f0 02 18 sethi $r15,#0x218
94152: 14 07 80 17 swi $r0,[$r15+#0x5c]
94156: 84 02 movi55 $r0,#2
94158: 46 f0 02 18 sethi $r15,#0x218
9415c: 14 07 80 12 swi $r0,[$r15+#0x48]
94160: 84 01 movi55 $r0,#1
94162: 46 f0 02 18 sethi $r15,#0x218
94166: 14 07 80 15 swi $r0,[$r15+#0x54]
9416a: 46 f0 02 18 sethi $r15,#0x218
9416e: 04 17 80 05 lwi $r1,[$r15+#0x14]
94172: 46 0f ff 00 sethi $r0,#0xfff00
94176: fe 0e and33 $r0,$r1
94178: 58 00 00 01 ori $r0,$r0,#0x1
9417c: 46 f0 02 18 sethi $r15,#0x218
94180: 14 07 80 05 swi $r0,[$r15+#0x14]
94184: 46 f0 02 18 sethi $r15,#0x218
94188: 04 17 80 07 lwi $r1,[$r15+#0x1c]
9418c: 46 0f ff 00 sethi $r0,#0xfff00
94190: fe 0e and33 $r0,$r1
94192: 46 f0 02 18 sethi $r15,#0x218
94196: 14 07 80 07 swi $r0,[$r15+#0x1c]
9419a: 46 f0 02 18 sethi $r15,#0x218
9419e: 04 07 80 00 lwi $r0,[$r15+#0x0]
941a2: 58 00 00 04 ori $r0,$r0,#0x4
941a6: 46 f0 02 18 sethi $r15,#0x218
941aa: 14 07 80 00 swi $r0,[$r15+#0x0]
941ae: 46 f0 02 18 sethi $r15,#0x218
941b2: 04 07 80 0c lwi $r0,[$r15+#0x30]
941b6: 96 04 xlsb33 $r0,$r0
941b8: c0 fb beqz38 $r0,941ae <LcdSpiWriteOneByte+0x92>
941ba: ed 08 addi10.sp #264
941bc: fc 80 pop25 $r6,#0x0 ! {$r6, $fp, $gp, $lp}

00094052 <DRV_SPI_No_Wait_WriteRead>:
94052: fc 02 push25 $r6,#0x10 ! {$r6, $fp, $gp, $lp}
94054: f0 83 swi37.sp $r0,[+#0xc]
94056: f2 81 swi37.sp $r2,[+#0x4]
94058: 80 03 mov55 $r0,$r3
9405a: 12 1f 80 04 shi $r1,[$sp+#0x8]
9405e: 12 0f 80 00 shi $r0,[$sp+#0x0]
94062: f0 03 lwi37.sp $r0,[+#0xc]
94064: 46 f0 02 18 sethi $r15,#0x218
94068: 14 07 80 13 swi $r0,[$r15+#0x4c]
9406c: f0 01 lwi37.sp $r0,[+#0x4]
9406e: 46 f0 02 18 sethi $r15,#0x218
94072: 14 07 80 16 swi $r0,[$r15+#0x58]
94076: 02 0f 80 04 lhi $r0,[$sp+#0x8]
9407a: 96 01 zeh33 $r0,$r0
9407c: 46 f0 02 18 sethi $r15,#0x218
94080: 14 07 80 14 swi $r0,[$r15+#0x50]
94084: 02 0f 80 00 lhi $r0,[$sp+#0x0]
94088: 96 01 zeh33 $r0,$r0
9408a: 46 f0 02 18 sethi $r15,#0x218
9408e: 14 07 80 17 swi $r0,[$r15+#0x5c]
94092: 02 0f 80 04 lhi $r0,[$sp+#0x8]
94096: 96 01 zeh33 $r0,$r0
94098: 9c 01 addi333 $r0,$r0,#1
9409a: 46 f0 02 18 sethi $r15,#0x218
9409e: 14 07 80 12 swi $r0,[$r15+#0x48]
940a2: 02 0f 80 00 lhi $r0,[$sp+#0x0]
940a6: 96 01 zeh33 $r0,$r0
940a8: 9c 01 addi333 $r0,$r0,#1
940aa: 46 f0 02 18 sethi $r15,#0x218
940ae: 14 07 80 15 swi $r0,[$r15+#0x54]
940b2: 02 0f 80 04 lhi $r0,[$sp+#0x8]
940b6: 96 41 zeh33 $r1,$r0
940b8: 46 00 00 ff sethi $r0,#0xff
940bc: 58 00 0f ff ori $r0,$r0,#0xfff
940c0: fe 46 and33 $r1,$r0
940c2: 46 00 00 ff sethi $r0,#0xff
940c6: 58 00 0f ff ori $r0,$r0,#0xfff
940ca: fe 46 and33 $r1,$r0
940cc: 46 f0 02 18 sethi $r15,#0x218
940d0: 04 27 80 05 lwi $r2,[$r15+#0x14]
940d4: 46 0f ff 00 sethi $r0,#0xfff00
940d8: fe 16 and33 $r0,$r2
940da: fe 0f or33 $r0,$r1
940dc: 46 f0 02 18 sethi $r15,#0x218
940e0: 14 07 80 05 swi $r0,[$r15+#0x14]
940e4: 46 f0 02 18 sethi $r15,#0x218
940e8: 04 17 80 07 lwi $r1,[$r15+#0x1c]
940ec: 46 0f ff 00 sethi $r0,#0xfff00
940f0: fe 0e and33 $r0,$r1
940f2: 46 f0 02 18 sethi $r15,#0x218
940f6: 14 07 80 07 swi $r0,[$r15+#0x1c]
940fa: 46 f0 02 18 sethi $r15,#0x218
940fe: 04 07 80 00 lwi $r0,[$r15+#0x0]
94102: 58 00 00 04 ori $r0,$r0,#0x4
94106: 46 f0 02 18 sethi $r15,#0x218
9410a: 14 07 80 00 swi $r0,[$r15+#0x0]
9410e: 46 f0 02 18 sethi $r15,#0x218
94112: 04 07 80 0c lwi $r0,[$r15+#0x30]
94116: 96 04 xlsb33 $r0,$r0
94118: c0 fb beqz38 $r0,9410e <DRV_SPI_No_Wait_WriteRead+0xbc>
9411a: fc 82 pop25 $r6,#0x10 ! {$r6, $fp, $gp, $lp}

没看懂：

果断各种地方加volatile参数：）

问题解决，我再也不用担心优化的问题了，就算O3也不怕。

volatile U8 SpiRxBuf[16];

void DRV_SPI_No_Wait_WriteRead (volatile uint8_t* txbuf, volatile uint16_t txsize, volatile uint8_t* rxbuf, volatile uint16_t rxsize)
{
SPI.TXSRCADDR.reg = (uint32_t)(&txbuf[0]);
SPI.RXDSTADDR.reg = (uint32_t)(&rxbuf[0]);
SPI.TBC.reg = txsize;
SPI.RBC.reg = rxsize;
SPI.TXFIFOSZ.reg = txsize + 1;
SPI.RXFIFOSZ.reg = rxsize + 1;
SPI.TXWPTR.field.PTR = txsize;

SPI.RXRPTR.field.PTR = 0;

SPI.CONTROL.field.START = 1;

while(! SPI.STATUS.field.READY);
}

void LcdSpiWriteOneByte(volatile U8 regData)
{
volatile U8 spi_tx_buf[256];
spi_tx_buf[0] = regData;

SPI.TXSRCADDR.reg = (uint32_t)(&spi_tx_buf[0]);
SPI.RXDSTADDR.reg = (uint32_t)(&SpiRxBuf[0]);
SPI.TBC.reg = 1;
SPI.RBC.reg = 0;
SPI.TXFIFOSZ.reg = 1 + 1;
SPI.RXFIFOSZ.reg = 0 + 1;
SPI.TXWPTR.field.PTR = 1;

SPI.RXRPTR.field.PTR = 0;

SPI.CONTROL.field.START = 1;

while(! SPI.STATUS.field.READY);
}

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