汇编 rdmsr, wrmsr

汇编 rdmsr, wrmsr

1、MSR简介

          Model Specific Register (MSR) as the name implies is model specific and may change from processor model number (n) to processor model number (n+1).

          MSR 总体来是为了设置CPU 的工作环境和标示CPU 的工作状态，包括温度控制，性能监控等，具体来说，分为以下几项:

　　1. Thermal

　　2. Frequency

　　3. C State

　　4. Microcode

　　5. EIST

　　6. TM

　　7. Key Features Of CPU

　　8. Voltage

　　9. Cache Control

　　10. MTRR

　　11. DCA(Direct Cache Access)

　　12. Machine Check

　　13. 硬件联机控制

　　14.other　

2、汇编指令简介

          MSR 是CPU 的一组64 位寄存器，可以分别通过RDMSR 和WRMSR 两条指令进行读和写的操作，前提要在ECX 中写入MSR 的地址。MSR 的指令必须执行在level 0 或实模式下。

          RDMSR    读模式定义寄存器。对于RDMSR 指令，将会返回相应的MSR 中64bit 信息到(EDX：EAX)寄存器中

          WRMSR    写模式定义寄存器。对于WRMSR 指令，把要写入的信息存入(EDX：EAX)中，执行写指令后，即可将相应的信息存入ECX 指定的MSR 中。

我用CPUID指令探测到我的处理器的指令集是3，这个值小于6，
这是肯定无法使用 在586以后才出现的RDMSR指令的。
但我不死心，于是在浩如烟海的NTDDK文档中搜索，终于找到了
一个叫X86_ReadRDMSR的API，
这个API有两个参数，我不知道如何使用，
但我试着在驱动中调用这个函数，
invoke X86_ReadRDMSR, 101H, offset buffer
果然如我所料，调用成功了，读出了101H号SERVICE的地址。
看来我们在程序中应尽量不要使用硬编码，而要使用系统提供好的
API接口。要不然你写的程序在别人的机器上却无法运行，那又有何价值呢，呵呵，一点感悟...
我在masm32 sdk里面的randlibk.inc头文件中找到了你说的X86_ReadRDMSR 

__asm{
      mov ecx,119h
      rdmsr
      or eax,00200000h
     wrmsr
}

 

 

 RDMSR—Read from Model Specific Register
Description
Loads the contents of a 64-bit model specific register (MSR) specified in the ECX register into
registers EDX:EAX. The EDX register is loaded with the high-order 32 bits of the MSR and the
EAX register is loaded with the low-order 32 bits. If less than 64 bits are implemented in the
MSR being read, the values returned to EDX:EAX in unimplemented bit locations are unde-fined.
This instruction must be executed at privilege level 0 or in real-address mode; otherwise, a
general protection exception #GP(0) will be generated. Specifying a reserved or unimplemented
MSR address in ECX will also cause a general protection exception.
The MSRs control functions for testability, execution tracing, performance-monitoring and
machine check errors. Appendix B, Model-Specific Registers (MSRs), in the Intel Architecture
Software Developer’s Manual, Volume 3, lists all the MSRs that can be read with this instruction
and their addresses.
The CPUID instruction should be used to determine whether MSRs are supported (EDX[5]=1)
before using this instruction.
Intel Architecture Compatibility
The MSRs and the ability to read them with the RDMSR instruction were introduced into the
Intel Architecture with the Pentium processor. Execution of this instruction by an Intel Archi-tecture processor earlier than the Pentium processor results in an invalid opcode exception #UD.
Operation
EDX:EAX ←  MSR[ECX];
Flags Affected
None.
Protected Mode Exceptions
#GP(0) If the current privilege level is not 0.
If the value in ECX specifies a reserved or unimplemented MSR address.
Real-Address Mode Exceptions
#GP If the value in ECX specifies a reserved or unimplemented MSR address.
Opcode Instruction Description
0F 32 RDMSR Load MSR specified by ECX into EDX:EAX
3-400
INSTRUCTION SET REFERENCE
RDMSR—Read from Model Specific Register (Continued)
Virtual-8086 Mode Exceptions
#GP(0)  The RDMSR instruction is not recognized in virtual-8086 mode.