ARM1176JZF-S/S3C6410处理器的操作…

Operating Modes

Eight operating modes are definedunder ARM1176JZF-S architecture, they are:

ModeMode TypeCommentsUserUserUser mode is the usual ARM program execution state, and is used forexecuting most application programsFIQPrivileged

Fast interrupt (FIQ) mode is used for handling fast interrupts

IRQPrivilegedInterrupt (IRQ) mode is used for general-purpose interrupthandlingSupervisorPrivilegedSupervisor mode is a protected mode for the OSAbortPrivilegedAbort mode is entered after a data abort or prefetch abortSystemPrivilegedSystem mode is a privileged user mode for the OSUndefinedPrivilegedUndefined mode is entered when an undefined instruction exceptionoccurs.Secure MonitorPrivilegedSecure Monitor mode is a Secure mode for the TrustZone SecureMonitor code.

Modes other than User mode are collectively known as privilegedmodes. Privileged modes are used to service interrupts orexceptions, or to access protected resources.

User and System modes are named as normal modes, other modes areexception modes. Why they are called "exception" modes? Becausethese 6 modes are entered by some kinds of exception, for exampleIRQ. While system mode is not same, it can be switched into, butnot triggered by any exception.

Registers (ARM state only)

ARM1176JZF-S processor has 40 registers totally:

• 33general-purpose 32-bit registers
• seven32-bit status registers.

These registers are not all accessible at the same time. Theprocessor state and operating mode determine the registers that areavailable to the programmer. Here I focus on ARM state registersonly.

The ARM state core register set contains 16 directly-accessibleregisters, R0-R15. Another register,the CurrentProgram Status Register (CPSR), containscondition code flags, status bits, and current mode bits. RegistersR0-R12 are general-purpose registers used to hold either data oraddress values. Registers R13, R14, R15, andthe Saved Program StatusRegister(SPSR) have the following special functions:

Stack PointerRegister R13 is used as the Stack Pointer(SP). R13 is banked for the exception modes. This means that anexception handler can use a different stack to the one in use whenthe exception occurred.Link RegisterRegister R14 is used as the subroutine LinkRegister (LR). Register R14 receives the return address when aBranch with Link (BL or BLX) instruction is executed. You can treatR14 as a general-purpose register at all other times.Program CounterRegister R15 holds the PC, in ARM statethis is word-alignedSaved Program Status RegisterIn privileged modes, anotherregister, the SPSR, is accessible. This contains the condition codeflags, status bits, and current mode bits saved as a result of theexception that caused entry to the current mode.

In ARM state, 16 general registers and one or two status registersare accessible at any time. In privileged modes, mode-specificbanked registers become available. The figurebelow shows the registers that are available ineach mode.

'Banked Register' (marked by gray triangle) means that thisregister has a divided instance under the corresponding exceptionoperating mode, that's a different register than the one in normalmode.

For example, the processor store some data to R13 in User mode; ifthe process switch from User mode to System mode and read the dateof R13, same value will be got; but if the process switch from Usermode to any other mode, when it read the data in R13, differentvalue will be got, because that's different register in fact.