多核DSP硬件信号量相关说明

In a multicore environment—where system resources must beshared—it is important to control simultaneous accesses to the availableresources. To ensure correct system operation, it is necessary to limit accessto a resource by one—and only one—core at a time; that is, it is necessary to providemutual exclusion for resources shared across multiple cores.

TI C66x DSP device contains an enhanced Semaphoremodule(硬件信号量模块) for the management of shared resources of the CorePacs. The semaphore2 module is accessibleacross all the cores on a multicore DSP.The semaphore enforces atomicaccesses to shared chip-level resources so that the read-modify-write sequence is notbroken.The Semaphore block has unique interruptsto each of the CorePacs to identify when that CorePac has acquired theresource.Semaphore resources within the module are not tied to specifichardware resources. It is a software requirement to allocate semaphore resources to thehardware resource(s) to be arbitrated. The Semaphore module supports 3 mastersand contains 32 semaphores to be used within the system.

There are two methods of accessing asemaphore resource:

• Direct Access:A CorePacdirectly accesses a semaphore resource. If free, the semaphore will be granted.If not,the semaphore is not granted.

• Indirect Access:A CorePacindirectly accesses a semaphore resource by writing it. Once it is free, aninterruptnotifies the CPU that it is available.

The semaphore module can be used as anarbiter to ensure mutual exclusivity when sharing resources over multiple coresin a multicore device. It provides up to 64 independent semaphores that can beacquired and released by the application.

Architecture:

Each of the 64 semaphores iscontrolled by either reading from or writing to one of the three registers:SEM_DIRECT,SEM_INDIRECT, or SEM_QUERY. These three registers form a setand each semaphore is attached to one such set. The semaphore module canservice requests using one of three methods: the direct request method, theindirect request method, or thecombined request method. These three methods provide flexibility to theapplication to either implementa polling-based system oraninterrupt-based callback mechanism for acquiring or locking a semaphore. None of the 64 semaphoreson the module are mapped to any resource or module on the device. Theapplication can choose to map any of the available semaphores to protect anyresource. There is no support provided by the semaphore module to store thesemaphore to resource mapping information. The mapping information must bemaintained by the software application.

Software Reset Considerations:

The semaphore module can bereset throughsoftware by writing to the reset bit of theSEM_RST_RUN register. On reset, all semaphoresare in ‘FREE’ state and all the errors cleared.

Hardware Reset Considerations:

On reset, all semaphores are in‘FREE’ state and all the errors cleared.

Interrupt Events and Requests:

       The semaphore module can generate aninterrupt to any of the cores on the device either to signal semaphore grant oran error. The module generates two sets of interrupts: semaphore grant(SEMINTn) and error (SEMERRn). Each set has the capability to interrupt anycore (0-N) on the device. The SEMINTn interrupt is routed to the interruptcontroller (INTC) of each core while the SEMERRn is routed to the respectivechip interrupt controller (CIC[n]).

DMA Event Support:

       All ‘N’ semaphore grant events (SEMINTn)can be used to trigger a DMA channel.The error events (SEMERRn)may be used to trigger DMA by using the TPCC interrupt controllers (CIC3) inconjunction with the CIC[n].

Releasing Semaphores:
       Whenevera core is finished using a shared resource, it must free the associatedsemaphore so that other processes waiting to use it can get access. To releasea semaphore and set its state to FREE, the application must write a ‘0x1’ to one ofSEM_DIRECT,SEM_INDIRECT, or SEM_QUERY register corresponding to thatsemaphore.
Note—A semaphore can be released onlyby a process that is running on the core that is currently its owner; any othercore trying to release the semaphore will generate an error.

Querying SemaphoreStatus:                                                                                                                   
It is reasonable that the applicationwould need tocheckthe status of a semaphore without acquiring it. The semaphore module provides the abilityto query of the semaphores.To query the status of a semaphore, the applicationneeds to read theSEM_QUERYregister ("Query Register(SEM_QUERYn)" on page 10 semaphore. The query returns information aboutwhether the semaphore is free; if it is not free, the application returns theID of the current owner.  

Error Gerneration and Handling:                                                                                                                                 

There arefour types of errors the semaphore module can generate:

 • Already Free Error: This error is generatedwhen an attempt is made to free a semaphore that is alreadyfree.                                     

 • Illegal Free Error: This error is generatedwhen an attempt is made to free a semaphore by a core that is not the currentowner.                  

 • Already Own Error: This error is generatedwhen a core attempts to acquire a semaphore that it alreadyowns.                                         

 • Already Requested Error: This error isgenerated when a core attempts to acquire a semaphore for which it already hasa pending request in the queue.

       Whenan error is generated by the module, theSEMERR register is updated with the errorcodesemaphore number (0-63) and the ID (0-N)of the core. TheSEMERR register can be cleared by writing a ‘0x1’ to the SEMERR_C
Note—The SEMERR register isinfluenced by the SEMERR interrupt state. To capture and register errorscontinuously besides clearing the SEMERR register,the error is detected. Referto the interrupt handling section for a description of the steps for resettingthe interrupt.

Directrequest is the simplest method used torequest a semaphore. The request behaves as an atomic read and set operation.The result of a request is either to grant the semaphore to the requesting coreor deny the request because the semaphore has already been granted to anothercore.

A direct requestis issued by reading the SEM_DIRECTregister corresponding tothe semaphore requested, there are 64 DIRECT registers, one corresponding toeach of the 64 semaphores. If the semaphore is free, the read returns “0x1”; ifthe request is rejected, the read returns the ID of the core that currentlyowns the semaphore.

No semaphore grant(SEMINTn) interrupts are generatedwhen the direct request method is used. However, an error interrupt may begenerated.

Direct Semaphore registerThere are 64 direct registers. Eachone is associated with and used to manage the respective semaphore.

 

 DirectRegister (SEM_DIRECTn):

读与写该寄存器时，Free域的意义不同。

WaitHwSem :Waits until requested semaphore is free. Function isblocking, so it will wait until requested semaphore is free and calling EU is not suspended during the wait time.

code:

#defineHWSEM_DIRECT_REG_ADDRESS   (volatile u32*)(0x02640100)

//0x02640100为SEM_DIRECT0的地址，SEM_DIRECTn的地址为HWSEM_DIRECT_REG_ADDRESS+n

u32  WaitHwSem(const u32 semId)//请求信号量

{

   u32 retVal;

   u32 semId;

   volatile u32  reg;

     retVal= NoError;

   if( semId < 64) {   //64为硬件信号量number

                    do{

                            reg=*(HWSEM_DIRECT_REG_ADDRESS +semId); //读寄存器

                  } while ((reg&1) !=1);

   }

   else  retVal = InvalidValue;

   return retVal;

}

FreeHwSem :This function unlocks the semaphore. If there are otherCPUs waiting the semaphore then thefirst CPU(first-in-first-out)andEU waiting for the semaphore is allowed to return successfully from its call toWaitHwSem().

code:

volatile u32DirectSEM[64];  //64个直接信号量SEM_DIRECT0~63寄存器地址

u32  FreeHwSem(const u32 semId)  //释放信号量

{

   u32 retVal;

   u32 semId;

     retVal= NoError;

   if(semId < 64) { //64为硬件信号量number

          DirectSEM[semId] =1;  //写寄存器

   }

   else  EHwSemRetVal_InvalidValue;

   return retVal;

}

Directsemapore用法：

WaitHwSem(semId);

 Accessshared resource code;

//对于Nyqusit来说，如果四个CPU共享同一段内存，那么需要为该段内存reserve一个硬件信号量semId，当某个CPU访问这段内存的时候，需要采用类似的代码,用semId信号量进行保护共享内存，实现只允许同时只有一个CPU在访问。

FreeHwSem(semId);

Semaphoremodule in block diagram of the TI C66x DSP device.