MStar2256A升级FW失败后TP无功能

一、背景：

有两种LCD：

一供：模组厂TCL，IC : ili9806e

二供：模组厂BOYI，IC : OTM8019A

有两种TP：

一供：模组厂欧菲光，IC：Fcocaltech6436U

二供：模组厂业际光电，IC：MSTAR2256A

两个项目3G（MTK6580平台）和4G（MTK6737M）项目

二、MSTART TP升级FW遇到问题

3G：用厂商APK升级FW时未出现异常，可以正常升级，升级后TP可正常使用

4G：用厂商APK升级FW时出现升级失败现象，之后TP无功能，无法触控

三、分析过程

1. 对比3G和4G驱动代码，无差异

2. 驱动文件无差异的话应该和系统有关了，具体和哪部分有关只能从Mstar IC升级失败时的log分析了

直接上升级失败时的log：

[    3.356161] <2>.(2)[1:swapper/0]*** DrvIcFwLyrVariableInitialize() ***
[    3.356967] <2>.(2)[1:swapper/0]*** DrvFwCtrlVariableInitialize() ***
[    3.357770] <2>.(2)[1:swapper/0]*** DrvIcFwLyrIsRegisterFingerTouchInterruptHandler() ***
[    3.359745] <2>.(2)[1:swapper/0]*** MStar Ontim ljc start fw upgrade start***
[    3.360629] <2>.(2)[1:swapper/0]***Ontim ljc 666 DrvIcFwLyrCheckFirmwareUpdateBySwId() ***
[    3.361658] <2>.(2)[1:swapper/0]Ontim ljc DrvFwCtrlCheckFirmwareUpdateBySwId g_ChipType = 0x7a
[    3.362732] <2>.(2)[1:swapper/0]*** _DrvFwCtrlMsg22xxCheckFirmwareUpdateBySwId() ***
[    3.363697] <2>.(2)[1:swapper/0]Ontim ljc _DrvFwCtrlMsg22xxCheckFirmwareUpdateBySwId start!
[    3.364742] <2>.(2)[1:swapper/0]*** _DrvFwCtrlMsg22xxGetFirmwareCrcByHardware() eEmemType = 1 ***
[    3.451653] <1>.(1)[89:hps_main]CPU2: shutdown
[    3.452201] <1>.(1)[89:hps_main][Power/hotplug] mt_cpu_kill, cpu: 2
[    3.453561] <1>.(1)[89:hps_main][HPS] (0200)(3)action end(99)(99)(0)(0) (4)(4)(4)(4)(1) (197)(8)(0) (736)(8)(0) (0)(99)(8)(0)(99) wifi_base(0)
[    3.479100] <0>.(0)[1:swapper/0]Hardware CRC = 0xad8ea9bd
[    3.480154] <0>.(0)[1:swapper/0]ERROR,495: id=1,addr: 59, transfer error
[    3.480981] <0>.(0)[1:swapper/0]ERROR,501: I2C_ACKERR
[    3.481610] <0>.(0)[1:swapper/0]I2C(1) dump info++++++++++++++++++++++
[    3.482430] <0>.(0)[1:swapper/0]I2C structure:
[    3.482430] <0>[I2C]Clk=13650,Id=1,Speed mode=1,St_rs=0,Dma_en=0,Op=1,Poll_en=0,Irq_stat=3
[    3.482430] <0>[I2C]Trans_len=1,Trans_num=1,Trans_auxlen=0,Data_size=ffff,speed=360
[    3.482430] <0>[I2C]Trans_stop=1,Trans_comp=1,Trans_error=2
[    3.485663] <0>.(0)[1:swapper/0]base address 0xe0c48000
[    3.486325] <0>.(0)[1:swapper/0]I2C register:
[    3.486325] <0>[I2C]SLAVE_ADDR=b2,INTR_MASK=f8,INTR_STAT=0,CONTROL=28,TRANSFER_LEN=1
[    3.486325] <0>[I2C]TRANSAC_LEN=1,DELAY_LEN=2,TIMING=1012,START=0,FIFO_STAT=1101
[    3.486325] <0>[I2C]IO_CONFIG=3,HS=102,DCM_EN=0,DEBUGSTAT=40,EXT_CONF=1800,TRANSFER_LEN_AUX=0
[    3.489848] <0>.(0)[1:swapper/0]before enable DMA register(0x0):
[    3.489848] <0>[I2C]INT_FLAG=0,INT_EN=0,EN=0,RST=0,
[    3.489848] <0>[I2C]STOP=0,FLUSH=0,CON=0,TX_MEM_ADDR=0, RX_MEM_ADDR=0
[    3.489848] <0>[I2C]TX_LEN=0,RX_LEN=0,INT_BUF_SIZE=0,DEBUG_STATUS=0
[    3.492796] <0>.(0)[1:swapper/0]DMA register(0xe0c42200):
[    3.492796] <0>[I2C]INT_FLAG=0,INT_EN=0,EN=0,RST=0,
[    3.492796] <0>[I2C]STOP=0,FLUSH=0,CON=0,TX_MEM_ADDR=0, RX_MEM_ADDR=0
[    3.492796] <0>[I2C]TX_LEN=0,RX_LEN=0,INT_BUF_SIZE=0,DEBUG_STATUS=0
[    3.495659] <0>.(0)[1:swapper/0]I2C(1) dump info------------------------------
[    3.496581] <0>.(0)[1:swapper/0]IicWriteData() error -22, nSlaveId=89, nSize=1
[    3.497475] <0>.(0)[1:swapper/0]*** _DrvFwCtrlMsg22xxRetrieveFirmwareCrcFromEFlash() eEmemType = 1 ***
[    3.601475] <0>.(0)[1:swapper/0]CRC = 0xffffffff
[    3.603392] <0>.(0)[1:swapper/0]ERROR,495: id=1,addr: 59, transfer error
[    3.604219] <0>.(0)[1:swapper/0]ERROR,501: I2C_ACKERR
[    3.604849] <0>.(0)[1:swapper/0]I2C(1) dump info++++++++++++++++++++++
[    3.605669] <0>.(0)[1:swapper/0]I2C structure:
[    3.605669] <0>[I2C]Clk=13650,Id=1,Speed mode=1,St_rs=0,Dma_en=0,Op=1DMA register(0xe0c42200):
[    3.616052] <0>[I2C]INT_FLAG=0,INT_EN=0,EN=0,RST=0,
[    3.616052] <0>[I2C]STOP=0,FLUSH=0,CON=0,TX_MEM_ADDR=0, RX_MEM_ADDR=0
[    3.616052] <0>[I2C]TX_LEN=0,RX_LEN=0,INT_BUF_SIZE=0,DEBUG_STATUS=0
[    3.618915] <0>.(0)[1:swapper/0]I2C(1) dump info------------------------------
[    3.619835] <0>.(0)[1:swapper/0]IicWriteData() error -22, nSlaveId=89, nSize=1
[    3.620728] <0>.(0)[1:swapper/0]*** _DrvFwCtrlMsg22xxGetFirmwareCrcByHardware() eEmemType = 2 ***
[    3.734903] <0>.(0)[1:swapper/0]Hardware CRC = 0x36f8404
[    3.735912] <0>.(0)[1:swapper/0]ERROR,495: id=1,addr: 59, transfer error
[    3.736739] <0>.(0)[1:swapper/0]ERROR,501: I2C_ACKERR
[    3.737368] <0>.(0)[1:swapper/0]I2C(1) dump info++++++++++++++++++++++
[    3.738188] <0>.(0)[1:swapper/0]I2C structure:
[    3.738188] <0>[I2C]Clk=13650,Id=1,Speed mode=1,St_rs=0,Dma_e[    3.857235] <0>.(0)[1:swapper/0]CRC = 0xffffffff
[    3.859150] <0>.(0)[1:swapper/0]ERROR,495: id=1,addr: 59, transfer error
[    3.860006] <0>.(0)[1:swapper/0]ERROR,501: I2C_ACKERR
[    3.860627] <0>.(0)[1:swapper/0]I2C(1) dump info++++++++++++++++++++++
[    3.861446] <0>.(0)[1:swapper/0]I2C structure:
[    3.861446] <0>[I2C]Clk=13650,Id=1,Speed mode=1,St_rs=0,Dma_en=0,Op=1,Poll_en=0,Irq_stat=3
[    3.861446] <0>[I2C]Trans_len=1,Trans_num=1,Trans_auxlen=0,Data_size=ffff,speed=360
[    3.861446] <0>[I2C]Trans_stop=1,Trans_comp=1,Trans_error=2
[    3.864678] <0>.(0)[1:swapper/0]base address 0xe0c48000
[    3.865341] <0>.(0)[1:swapper/0]I2C register:
[    3.865341] <0>[I2C]SLAVE_ADDR=b2,INTR_MASK=f8,INTR_STAT=0,CONTROL=28,TRANSFER_LEN=1
[    3.865341] <0>[I2C]TRANSAC_LEN=1,DELAY_LEN=2,TIMING=1012,START=0,FIFO_STAT=1101
[    3.865341] <0>[I2C]IO_CONFIG=3,HS=102,DCM_EN=0,DEBUGSTAT=40,EXT_CONF=1800,TRANSFER_LEN_AUX=0
[    3.868839] <0>.(0)[1:swapper/0]before enable DMA register(0x0):
[    3.868839] <0>[I2C]INT_FLAG=0,INT_EN=0,EN=0,RST=0,
[    3.868839] <0>[I2C]STOP=0,FLUSH=0,CON=0,TX_MEM_ADDR=0, RX_MEM_ADDR=0
[    3.868839] <0>[I2C]TX_LEN=0,RX_LEN=0,INT_BUF_SIZE=0,DEBUG_STATUS=0
[    3.871809] <0>.(0)[1:swapper/0]DMA register(0xe0c42200):
[    3.871809] <0>[I2C]INT_FLAG=0,INT_EN=0,EN=0,RST=0,
[    3.871809] <0>[I2C]STOP=0,FLUSH=0,CON=0,TX_MEM_ADDR=0, RX_MEM_ADDR=0
[    3.871809] <0>[I2C]TX_LEN=0,RX_LEN=0,INT_BUF_SIZE=0,DEBUG_STATUS=0
[    3.874673] <0>.(0)[1:swapper/0]I2C(1) dump info------------------------------
[    3.875577] <0>.(0)[1:swapper/0]IicWriteData() error -22, nSlaveId=89, nSize=1
[    3.876653] <1>.(1)[1:swapper/0]nCrcMainA=0xad8ea9bd, nCrcInfoA=0x36f8404, nCrcMainB=0xffffffff, nCrcInfoB=0xffffffff
[    3.877969] <1>.(1)[1:swapper/0]Main block and Info block are broken.

[    3.878771] <1>.(1)[1:swapper/0]Ontim ljc 111 Go to normal boot up process.

[    3.983342] <1>.(1)[1:swapper/0]*** MStar Ontim ljc start fw upgrade end***

由于未抓取到升级失败时的log，暂时只抓了升级失败后重启会再次进行升级时提示的log信息，此时提示：

[    3.877969] <1>.(1)[1:swapper/0]Main block and Info block are broken.

说明上一次升级异常，

Mstar IC升级时分为几个区域：MainA，MainB，InfoA，InfoB

进行如下三个判断后会直接提示升级失败

    if (nCrcMainA == nCrcMainB && nCrcInfoA == nCrcInfoB) // Case 1. Main Block:OK, Info Block:OK

。。。。。。

    else if (nCrcMainA == nCrcMainB && nCrcInfoA != nCrcInfoB) // Case 2. Main Block:OK, Info Block:FAIL

。。。。。。

    else if (nCrcMainA != nCrcMainB && nCrcInfoA == nCrcInfoB) // Case 3. Main Block:FAIL, Info Block:OK

。。。。。。

    else // Case 4. Main Block:FAIL, Info Block:FAIL
    {
        printk("Main block and Info block are broken.\n");
        printk("Ontim ljc 111 Go to normal boot up process.\n");

     }

log里面只提示不匹配，无法获知进一步的信息，此时只能从3G和4G驱动代码差异来考虑，忽然想到，升级时是通过I2C进行通信的，会不会是I2C通信方面出现了问题呢？

此时忽然想起来4G上面I2C通信速率和3G不一样，之前将4G的I2C速率改为360k了，貌似有一线生机，试试吧，将I2C速率改为100K后，升级OK；

三、查看TP设备挂载在哪个I2C上方法

1. 通过TP的原理图

红圈所著，因为不太确定SDA1是第一个I2C设备还是第二个设备，再次搜索SDA0，发现有SDA0，所以确认了挂载在i2c-1上（编号为2的i2c设备上）

2. 通过编译生成的dtsi文件来查看

out/target/product/$(Project)/obj/KERNEL_OBJ/arch/arm/boot/dts/cust.dtsi

&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
camera_main@10 {
compatible = "mediatek,camera_main";
reg = <0x10>;
status = "okay";
};
camera_main_af@0c {
compatible = "mediatek,camera_main_af";
reg = <0x0c>;
status = "okay";
};
camera_sub@3c {
compatible = "mediatek,camera_sub";
reg = <0x3c>;
status = "okay";
};
};


&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
cap_touch@38 {
compatible = "mediatek,cap_touch";
reg = <0x38>;
status = "okay";
};
i2c_lcd_bias@26 {
compatible = "mediatek,i2c_lcd_bias";
reg = <0x26>;
status = "okay";
};
};

备注：

此dtsi是根据dws里面的配置来生成的，所以我们也可以看dws里的i2c配置来确定我们的TP挂载在哪个I2C设备上

3.通过代码

在驱动文件里面，如敦泰驱动文件：focaltech_core.c

#define IIC_PORT                   1// MT6572: 1  MT6589:0 , Based on the I2C index you choose for TPM

 static int __init tpd_driver_init(void) {
        printk("MediaTek fts touch panel driver init\n");
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 19))
tpd_get_dts_info();
#else
        i2c_register_board_info(IIC_PORT, &fts_i2c_tpd, 1);
#endif
if(tpd_driver_add(&tpd_device_driver) < 0)
        TPD_DMESG("add fts driver failed\n");
return 0;
 }