S5PV210 DATASHEET Section2.6 booting sequence 翻译

datasheet Section2.6 booting sequence

数据手册 2.6 启动顺序部分详解

6 BOOTING SEQUENCE 6.1 OVERVIEW OF BOOTING SEQUENCES5PV210 consists of 64KB ROM and 96KB SRAM as internal memory. For# S5PV210 的内存是由 64KB 的ROM 96KB 的SRAM 构成的，booting, internal 64KB ROM and internal 96KB SRAM regions can be # S5PV210 启动的时候，64KB 的ROM 96KB 的SRAM 都用得到 used. S5PV210 boots from internal ROM to enable secure booting, # S5PV210 选择从 iROM 启动可以确保安全启动which ensures that the image cannot be altered by unauthorized # 确保非授权用户不能修改镜像users. To select secure booting or normal booting, S5PV210 should # 为了选择 安全启动 或者 正常启动， S5PV210 应该使用 e-fuse 信息，use e-fuse information. This information cannot be altered after # e-fuse 信息能通过编程改变being programmed.The booting device can be chosen from following list:# 启动设备可以选择以下方式启动• General NAND Flash memory• OneNAND memory• SD/ MMC memory (such as MoviNAND and iNAND)• eMMC memory• eSSD memory• UART and USB devicesAt system reset, the program counter starts from the iROM codes in # 当系统启动的时候，在内部 ROM 区域中的 iROM 代码将启动程序计数器，internal ROM region. However, the system reset may be asserted not # 然而，系统重启并不是只在系统启动时刻发生，only on booting time, but also on wakeup from low power modes. # 在低电量模式下也会激活系统复位Therefore, the iROM code must execute appropriate process # 因此， iROM 代码必须根据启重启状态（见表 6-1 ）执行合适的程序according to the reset status (refer to Table 6-1).The boot loader is largely composed of iROM, first and second boot # 启动加载器的程序主要是由 BL0（在 iROM 中）、BL1（第一个引导加载程序）和 BL2（第二个引导加载程序）的代码组成的loaders. The characteristics of these boot loaders are:# 启动加载器 的特征是：• iROM code: Contains small and simple code, which is platform-independent and stored in internal memory# iROM 的代码少量而且简单，代码存储在ROM内存区域中并且这些代码是独立于平台的• First boot loader: Contains small and simple code, which is platform-independent and stored in external memory device. Related to secure booting.# 第一个引导加载程序：包含少量而且简单的代码，代码独立于平台并且存储在外存，跟安全启动有关• Second boot loader: Contains complex code, which is platform-specific and stored in external memory device.# 第二个引导加载程序：包含复杂的代码，与具体平台相关联，代码存储在外部内存If you select secure booting, iROM code and first boot loader provide integrity checking function (that is it uses public key algorithm) to verify loaded image. # 如果你选择安全启动，iROM 代码和第一个引导加载程序会提供完整的检查功能的函数（这个函数使用公共安全算法）去核查启动的镜像There are 160 e-fuse bits of secure boot key, and they are used to authenticate loaded public key before the iROM’s integrity check. For more information on secure booting, refer to Chapter.# 函数有 160 个安全启动键的 e-fuse 比特, 它们在 iROM 完整性检查之前用于验证公钥加载。有关安全的引导的更多信息,请参考章节。

• The iROM code is placed in internal 64KB ROM. It initializes basic system functions such as clock, stack, and heap.# iROM代码放置在内部64 kB ROM。它初始化基本的系统功能,例如时钟,堆栈和堆。• The iROM loads the first boot loader image from a specific booting device to internal 96KB SRAM. The booting device is selected by Operating Mode (OM) pins. # iROM 中的代码将从特定的引导设备内部加载第一个引导程序镜像到 96kB 的 SRAM 中。哪种引导设备由操作模式(OM) 的引脚位置选择。According to the secure boot key values, the iROM code may do an integrity check on the first boot loader image.# 根据安全启动键值,iROM 代码可能在第一次镜像加载程序时进行完整性检查。• The first boot loader loads the second boot loader then may check the integrity of the second boot loader according the secure boot key values.# 第一个引导加载程序加载第二个引导加载程序然后根据安全启动键值检查第二引导加载程序的完整性。• The second boot loader initializes system clock, UART, and DRAM controller. After initializing DRAM controller, it loads OS image from the booting device to DRAM. According to the secure boot key values, the second boot loader can do an integrity check on the OS image.# 第二个引导加载程序初始化系统时钟,UART,DRAM 控制器。在初始化 DRAM 控制器后,它从启动设备中加载操作系统镜像到DRAM。根据安全启动键值,第二个引导加载程序可以在OS镜像上进行完整性检查。• After the booting completes, the second boot loader jumps to the operating system.# 启动完成后,由第二个引导加载程序跳转到操作系统代码执行。The iROM code reads the OM pins to find the booting device. The OM register provides the OM pin and other information required for booting. For more information on OM register, refer to Chapter 02.01, "Chip ID".# iROM 代码读取 OM引脚 找到启动设备。OM 寄存器提供了 OM 引脚和启动所需的其他信息。有关OM寄存器的更多信息,请参考章节02.01,“chip ID”。The OM pin decides the booting devices such as OneNAND, NAND, MoviNAND, eSSD and iNAND. It also decides the device options such as bit width, wait cycles, page sizes, and ECC modes.# OM引脚 决定启动哪种设备,如OneNAND NAND,MoviNAND,eSSD和难以。它还决定了设备选项如宽度,等待周期,页面大小,ECC模式。NOTE: USB booting is provided for system debugging and flash reprogramming, not for normal booting. Hence, it is selected by toggling OM[5:4] pin to “2’b10” without considering other OM pin values.# 注意:USB启动提供了系统调试和flash重组,这并不是正常的启动。因此,OM[5:4] 引脚切换到 “2 'b10” 并且不考虑其他 OM 引脚值时选择 USB 启动模式。The iROM code in internal 64KB ROM is named BL0. And the first boot loader is named BL1# 内部 64kB ROM中的iROM代码叫 BL0。第一个引导加载程序叫 BL1

6.2 SCENARIO DESCRIPTION 6.2.1 RESET STATUSThere are several scenarios for system reset such as hardware reset, watchdog reset, software reset, and wake up from power down modes. For each scenario, the mandatory functions are summarized in Table 6-1# 以下有几个系统复位场景，例如硬件复位,看门狗复位,软件复位,醒来从断电模式。对于每一个场景中, 实现各种情景下的复位功能需要的条件归纳如表 6 - 1

At the time of hardware reset and watchdog reset, the system should boot fully with the first boot loader and the second boot loader and loading of OS image. The new reset status is classified as reset group0.# 在硬件复位及看门狗复位时,系统应该完全启动第一个引导加载程、第二引导加载程序和加载操作系统映像。新的重置状态被分在 group0 组中。Since the contents of DRAM memory are preserved in the SLEEP mode, it does not require loading the OS image to DRAM. However, SoC internal power is not supplied to internal logic during SLEEP mode and all contents in internal SRAM are not preserved. # 由于 DRAM 内存的内容在睡眠模式下保存,它并不需要加载操作系统映像到 DRAM 中。但是,在睡眠模式下 SoC 内部功率并不提供给内部逻辑并且内部存储器中所有内容并不保存。 Therefore, the first boot loader and the second boot loader should be loaded again. This reset status is classified as reset group1.At the time of software reset, The loading of boot loader is executed. # 因此,应该再次加载第一个引导加载程序和第二个引导加载程序。这个重置状态被分在 group1 组。软件复位时,会加载引导加载程序。Although top block’s power is gated in DEEP_STOP and DEEP_IDLE modes, the internal SRAM can be reserved, so that the re-loading of boot loader is not required. # 尽管在 DEEP_STOP、DEEP_IDLE 模式下, top block 的功率会被封闭，内部存储器可以保留,所以并不需重新加载 引导加载程序。In case of non-retention of SRAM in DEEP_STOP and DEEP_IDLE modes, the first boot loader should be loaded again. These software reset that wake up from DEEP_STOP and DEEP_IDLE statuses are classified as reset group2.# 在DEEP_STOP SRAM 和 DEEP_IDLE 模式下的 SRAM 不能保留，所以第一次引导加载程序应该被再次加载。这些由 DEEP_STOP 和 DEEP_IDLE 状态激活的软件复位情况属于复位group2。If system enters into all power down modes, the current system status should be saved to safe memory region such as DRAM, so that the system continues processing seamlessly after waking up from power down modes.# 如果系统进入任何电源中断模式,当前系统状态应该被保存到例如 DRAM 这样的安全的内存区域内,这样系统从断电模式中醒来后可以无缝地处理程序。Finally, the restoring preious state function is required on wake up from SLEEP, DEEP_STOP, and DEEP_IDLE modes.# 最后,SLEEP、DEEP_STOP 和 DEEP_IDLE 模式会恢复之前的状态函数

Program code starts from internal ROM(iROM) and moves to internal SRAM(iRAM). Finally, program executes on DRAM.# 程序代码从内部 ROM(iROM) 移动到内部存储器 SRAM(iRAM)。最后,程序在DRAM执行。The booting sequence in internal ROM is as follows:# iROM 的启动顺序如下1. Disable the watchdog timer.2. Initialize the instruction cache controller.3. Initialize the stack and heap region.4. Check secure key.5. Set Clock divider, lock time, PLL (MPS value), and source clock.6. Check OM pin and load the first boot loader (The size of boot loader depends on S/W) from specific device (block number 0) to iRAM.7. If secure booting is successful, execute integrity check8. If integrity check passes, then jump to the first boot loader in iRAM (0xD002_0010)# 关看门狗# 初始化指令cache# 初始化栈# 初始化堆# 初始化块设备复制函数device copy function# 设置SoC时钟系统# 复制BL1到内部IRAM（16KB）# 检查BL1的校验和# 跳转到BL1去执行The booting sequence in internal SRAM is as follows:1. Load the second boot loader from boot device to iRAM.2. If secure booting is successful, execute integrity check.3. If integrity check passes, then jump to the second boot loader in iRAM (The jumping address depends on user's software)4. If integrity check fails, then stop the first boot loader.5. The second boot loader Initializes the DRAM controller.6. Load the OS image from specific device (block number 1) to DRAM.7. Jump to OS code in DRAM (0x2000_0000 or 0x4000_0000)# 从启动设备加载 BL2 到 iRAM# 如果安全启动成功,执行完整性检查。# 如果完整性检查通过,会跳转到位于 iRAM 中的 BL2 (跳地址取决于用户的程序)# 如果完整性检查失败, BL1 会停止执行# BL2 初始化DRAM控制器。# 从特定的设备(块编号1)加载操作系统映像到 DRAM。# 跳转 DRAM 中的操作系统代码(0x2000_0000或0x4000_0000)The booting sequence in DRAM is as follows:1. If S5PV210 is powered on from SLEEP, DEEP_STOP, or DEEP_IDLE modes, then restore the previous state.# 如果 S5PV210 是在 SLEEP、DEEP_STOP 或 DEEP_IDLE 模式中启动,会恢复之前的状态。2. Jump to OS code# 跳转到系统代码

6.2.3 FIXED PLL AND CLOCK SETTING# 固定的 PLL 和时钟设置To speed up first boot loader’s operation, the first boot loader initializes the PLL with fixed value. Fixed PLL setting is as follows:# 为加快 BL0 的操作,首先用固定值初始化 PLL。PLL 的 固定值设置如下: • APLL: M=200, P=6, S=1 FOUT = (MDIV X FIN )/ (PDIV X 2(SDIV-1))) = 800MHz• MPLL: M=667, P=12, S=1 FOUT = (MDIV X FIN) / (PDIV X 2SDIV) = 667MHz• EPLL: M=80, P=3, S=3, K=0 FOUT = ((MDIV+KDIV) X FIN) / (PDIV X 2SDIV) = 80MHzTable 6-2 shows the system clock frequencies for various external crystals after initialization of the PLL by first boot loader.